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Forum: FPGA, VHDL & Verilog


Programmable logic


Subject Author Replies Last post
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Ring oscillator timing simulation Chris C1111 24
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Getting Rank of Elements in an Array Md B. 4
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FPGA pin multiple usage SparkyT 6
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Making a frequency reducer Eric J. 6
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Help not working properly daniel 2
floating point result is wrong Onur 2
Clock frequency reducer Eric J. 3
johnson counter VhdlTest V. 2
Counter with overflow signal at 1001 Eric J. 1
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vhdl input clock to output Chris MiTo 4
4bit counter with load test bench fail Christos Goulas 8
Programming OR and XNOR with 4 inputs using functions NMV 2
Binary counter daniel 3
help in reading a large text file using verilog. Alangs Kannan 19
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Calculator from keyboard display 7seg Ali R. 10
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U250 flashing unsuccessful Pi N. 0
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Modelsim Altera verilog Error state emory exceed but i'm pretty sure there's plenty of space left Steve W. 0
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Digital Clock Manager Divya P. 3