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Forum: FPGA, VHDL & Verilog Where is the fatal error? I couldnt find it


von Engin (Guest)


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Hello everyone,

I compiled the 2 codes I gave in the attachment on Questasim without any 
errors. But when i want to start simulation i get this error but i 
couldn't find any problem. I'm new at this job, I'd be very happy if you 
could help.

von Pflegeassistenz (Guest)


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*_TIME hat 4bit während DISPLAY 7 bit braucht.

von Andras H. (kyrk)


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A bigger screenshot that shows the complete output?

There is something about an array that does not match the length....

von Andras H. (kyrk)


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DISPLAY <= CURRENT_TIME;
        else
          DISPLAY <= ALARM_TIME;

Maybe this one? Left side is 7 bit, right side is less.

von Engin (Guest)


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Yes, you are right. So if I get 4 bits of input how can I suppress it to 
7 bits as 7 segments?

von Engin (Guest)


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This is what i have to do

von hm (Guest)


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Maybe you have to give every value the correct 4bit.

If the int is 9 (1001) so the Segments are all on (111 1111).
How is it decided what time is the alarm time?
Does the current time just count up from 0 to 9?

von hm (Guest)


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I forgot. You also have to give the correct segments the high.
So if it ist
A6 A5 A4 A3 A2 A1 A0
set the correct segments high to give the correct number if the both 
times matching.

von hm (Guest)


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Maybe it would be interesting to see the display too

von Rezy (Guest)


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There are some issues with your design. First, as already noted, you're 
trying to assign vectors of different lengths. Second, you're driving 
DISPLAY from multiple processes. I'd suggest to just use two processes. 
One that generates the sound, the other that generates the display 
output. It should actually be something like
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process (ALARM_TIME, CURRENT_TIME, SHOW_A)
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begin
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  if SHOW_A = '0' then
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    case CURRENT_TIME is
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      -- 7 segment encodings...
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    end case;
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  else
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    case ALARM_TIME is
9
      -- 7 segment encodings...
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    end case;
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  end if;
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end process;
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process (ALARM_TIME, CURRENT_TIME)
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begin
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  if ALARM_TIME = CURRENT_TIME then
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    SOUND_ALARM <= '1';
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  else
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    SOUND_ALARM <= '0';
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  end if;
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end process;

Note that in general one would not just assign the outputs inside a 
process. One would rather use a signal that is assigned to the output 
outside a process. Although in your case it does not matter.

von Engin (Guest)


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Thanks for helping. I will test your code. I tried again, changing the 
code a bit. The error is as follows. My code is like this.
What do you say about this?

Thanks Again.

von Rezy (Guest)


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Engin wrote:
> Thanks for helping. I will test your code. I tried again, changing
> the
> code a bit. The error is as follows. My code is like this.
> What do you say about this?
>
> Thanks Again.

The entity DDRV has 3 inputs and 2 outputs. Your testbench instantiates 
the entity using 7 ports in total - the 5 former ports as in your task 
as well as two additional ports DISP_CURRENT and DISP_ALARM. These 
"ports", however, are internal signals used in the architecture. They 
don't appear as output ports, which is why the simulator is complaining 
as you're trying to connect to ports that are not assigned as ports..

von Engin (Guest)


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what about now?

von Engin (Guest)


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I deleted signals

von Engin (Guest)


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This is the final version of my code. if you have time to check it 
please look at this

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