My goal is to convert a binary input number to a std_logic_vector
signaling which segments to activate/deactivate on a
seven-segment-display.
'segments' is basically a vector, with each bit representing a segment a
through g, with the display being enumerated clockwise from the top (a)
to the upper left (f). The middle segment is g.
When I run this, I get an error at each if line, telling me that the
'then's are wrong and that I should properly use a 'generate' - which is
not really what I am trying to do.
Can someone tell me how to fix this?
1 | library ieee;
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2 | use ieee.std_logic_1164.all;
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3 |
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4 | entity BCDDecoder is
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5 |
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6 | port (
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7 | digit : in std_logic_vector(3 downto 0);
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8 | segments : out std_logic_vector(6 downto 0)
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9 | );
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10 | end BCDDecoder;
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11 |
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12 | architecture rtl of BCDDecoder is
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13 |
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14 | begin
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15 |
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16 | if digit = "0000" then
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17 | segments <= "1111110";
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18 | end if;
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19 |
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20 | if digit = "0001" then
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21 | segments <= "0110000";
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22 | end if;
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23 |
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24 | if digit = "0010" then
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25 | segments <= "1101101";
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26 | end if;
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27 |
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28 | if digit = "0011" then
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29 | segments <= "1111001";
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30 | end if;
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31 |
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32 | if digit = "0100" then
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33 | segments <= "0110011";
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34 | end if;
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35 |
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36 | if digit = "0101" then
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37 | segments <= "1011011";
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38 | end if;
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39 |
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40 | if digit = "0110" then
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41 | segments <= "0011111";
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42 | end if;
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43 |
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44 | if digit = "0111" then
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45 | segments <= "1110000";
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46 | end if;
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47 |
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48 | if digit = "1000" then
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49 | segments <= "1111111";
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50 | end if;
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51 |
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52 | if digit = "1001" then
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53 | segments <= "1110011";
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54 | end if;
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55 | end architecture rtl;
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