How to check the value of a specific bit in vhdl

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Depending on what should be done, this could be a use case for a for 
loop:
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for i in 0 to signle'high loop/generate
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    if signle(i) = '1' then
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        ...
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    end if;
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end loop/generate
I hope there is no syntax error, but the idea should be clear.

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