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Subject Author Replies Last post
Which approach can I use to demodulate this signal? Daniel Flor 5
Weird warning for my design dayana42200 1
Profibus Master Zen 5
HELP ME ON EA-PS2032 Hai T. 1
facing intra clock path setup violations jose 0
How make memset funciotion on vhdl? Martin F. 1
Dell U2713H on Mac: forcing RGB mode instead of YCbCr Andreas Schwarz 380
Ds18b20 Problem Sappy M. 5
Error Loading Design Model Sim PE student edition 10.1 Amit Ram S. 8
STM32H7 real-time data tracing via SWD not working Solocan Z. 1
CAN controller implementation using FPGA CJU 7
One big module vs multiple small? Mark L. 7
31kHz PWM MOSFETs get hot but stay cold at 3.9kHz Harvesthor 10
PWM on SAMD21 Víctor 0
is it possible for bcd to ascii module? John B. 3
Free 8051 Keil C Source Code. Murray V. 2
coding at gate level? Mark L. 5
help in reading a large text file using verilog. Alangs Kannan 14
Verilog For Counter: How to store 32 bit counter values as 4 8-bit registers ? Saraswathy S. 9
Li Ion charge only with CV - what happens vwilde 4
pimp my VC96(Voltcraft)_en Matthias S. 0
Verilog Simple SPI Code? Ferhat YOL 13
LRM. 10.4.2 non blocking synthesis Mark L. 3
Mr.Wayne Stambaugh be the PCB design contest judge? Andree A. 0
Error loading design (Modelsim student version) Keltuzad 31
Record port map in VHDL New 3
Cpu: why only on posedge? Mark L. 6
Post-synthesis simulation, Quartus and Modelsim-Altera Reza M. Shahshahani 7
Reverse polarity via GPIO Tim 3
Task in verilog for sending the responses for respective address Sushma K. 2
Link External RAM Arduino Mega 2560 (with Arduino IDE?) Jonas B. 4
I am thinking a FPGA design with video capture Vincent Y. 3
Clear_preset flip flop inputs BK_Coder 2
UART doesn't stop transmitting and sends wrong value helloGuys 2
OS on a fpga Mark L. 12
How to generate Trigger for 500ns in Verilog ? Saraswathy S. 0
Hi everybody! Nathan J. 0
initializing oled display using vhdl Alex H. 2
code transfer from iar to gcc compiler Cetin Cetn 2
anyone tried PCBWay Andrew 3
Designated Number Counter and Cycle counter 2 Digit Jason Wang 13
SPI slave design idea? Jack BK 24
FT4222H Problem avi 1
Interfacing ADC with FPGA Varun Chitransh 3
What microcontroller is this? [image] Tim 8
Simulink Voltage-to-Frequency Converter on matlab. Bùi Cường 3
DIGIASIC Cyclone II Development Board Info Mehrdad Taraz 2
oscillator 50MHz Dima Potapov 5
AIL EATON 2075B-205 DH6SBN 1
New to VHDL Need help with this assignment James Yang 8
APA102 led strip with altera DE2-115 Board Peter 3