Topics in all forums

Subject Author Replies Last post
Synthesis doesn't match simulation Kyle Gacek 3
verilog Voltage Control Oscillator Rock Bog 1
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Phase detector in Xilinx Rock Bog 23
ARM Code for color sensor Neethu P 1
USB Host CDC connection (to Surf Stick) on a frdmk64F (Cortex M4) Bastian S. 0
Digital Mixer implementation for DUC/DDC ATIF JAVED 1
New member!! Jessica Jung 1
Combinatorial logic Julian Mortimer 0
What is the effect of reducing nfft less than the signal length Usman Ashraf 1
OpenHR20: Firmware for Honeywell Rondostat HR20E (1, 2, 3) Mario Fischer 1117
Error loading design (Modelsim student version) Keltuzad 25
Filesystem for NOR flash Peter Ivanov 0
Want to join us? Can you develop a sleep-tracker like wearable? Alex Ander 0
Count number of more than 4 consecutive zeros Usman Ashraf 4
4-bit counter simulation problem Paolo 2
simple syntax error near clk Rock Bog 11
QSPI - STM32F7 Petr Klaun 15
how to program mojo plus board with ise design Pouya Nosratkhah 1
Dell U2713H on Mac: forcing RGB mode instead of YCbCr Andreas Schwarz 373
Implement FIR filter in verilog using FDA tool Usman Ashraf 5
Help in simulating ALU with register file Fadi CPP 0
how to scale output of butterfly unit radix 2 for further stages Pravesh Rathee 2
RS232 from http://www.lothar-miller.de. SparkyT 1
I2C/TWI and FreeRTOS on Arduino Mega2560 / AVR Oliver G. 0
An array of std_logic_vector driven by two processes. Pablo Picasso 2
pcb welcome to our website Dahsui Huida 2
[QUESTION] Satnav firmware disassembly - help required :) RowanX 0
Quartus II connect bus to 2D array-input of block C17 1
SPI communication between two microcontrollers jeorges FrenchRivera 13
verbose output from quartus Quentin 0
Where is the Thermometer Project Thermometerbuilder 7
building a cross toolchain for 68k, avr and arm alexander 0
How to use the AVR Assembler (AVRASM2) for complex projects Thomas R. 0
the verilog code occupies the hole resources Alireza Shavakandi 3
VGA controller-Verilog sinhton 8
MPLAB X IDE error during compilation c file Davide Magnelli 0
Zero-overhead blocking AXI4-stream function Julian Mortimer 0
Systolic Array Dayana Saiful 20
Is this nonesense? Julian Mortimer 3
Need help in code Gombo Khorloo 3
Help in vhdl project Bozidar Kelava 2
Display registers value - ARM assembly Ab Abrams 1
PSO based fir filter design and functional verification in fpga Bharat Lal106 1
Skipped part of design Op Op 2
Smoke detector upcycling? Mike 2
PCB Manufacturer and fabricators Directory Ryan 0
Using a button for two functions play/pause Ya Yo 2
ATMEL-ICE Basic + AVR Studio 7 + ATMEGA8L-8PU Winfried Babinsky 1
Tocken bucket based on FIFO Melisa Čehajić 0