Hi guys. I am student at high school interested in VHDL programming. I have three components and I would like to connect them to one component this way. First component has some input. Output of this component is input to the second component and outpu of the second component is input of third component and this component produces output. Could anyone please help me with this ? If so, please contact me on the mail I have attached. I would really appreciate some help. Thank you. Email Addresss: durko208@gmail.com
Durko Rurko wrote: > If so, please contact me on the mail This is not the way a forum works, you know? Additionally I don't think you'll have too much luck in finding someone to do your homework. So, let's handle it the way we handle it: you start with something and when you encounter specific problems, then you ask for help.
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