Help not working properly

daniel Guest #7006549
Rate this post
• ▲ useful
▼ not useful 
Hello everyone, my English is not the best I would love patience.

I wrote a counter code designed to schedule the transfer of information 
from an array to a single output signal.

The problem is that it bounces the value of control j from zero to a 
maximum of one time.

I would love to know what the problem is, the goal is to split a vector 
of 24 into 3 vectors of 8 when count_2 = 1.

If I do not use the tra tra increase, and if I do it does not respond.

1
process(clk,res_in)

2
variable Q1 : integer range 0 to 2000:=0;

3
variable Q2 : integer range 0 to 8:=0;

4
variable Q3,Q4 : integer range 0 to 8:=0;

5
begin

6


7
if(res_in = '1' or Q4=1) then 

8
    Q1:=0;

9
    Q2:=0;

10
    Q3:=0;

11
    Q4:=0;

12
    

13
            elsif(rising_edge(clk) and enb='1') then 

14
            Q1:=Q1+1;

15
            

16
                if(Q1=2000) then 

17
                Q1:=0;

18
                tra<=not(tra);

19
                Q2:=Q2+1;

20
                

21
                    if(Q2=8) then 

22
                    Q2:=0;

23
                    Q3:=Q3+1;

24
                    

25
                        if(Q3=8) then 

26
                        Q3:=0;

27
                        Q4:=Q4+1;

28
                        

29
                            if(Q4=8) then 

30
                            Q4:=0;

31
                            end if;

32
                            

33
                        end if;

34
                        

35
                    end if;

36
               end if;

37
         end if;   

38
         

39
         

40
         if(count_2=1 and rising_edge(tra)) then 

41
         if(j<7) then

42
            Dataout(0)<=Data(j)(7 downto 0);

43
            Dataout(1)<=Data(j)(15 downto 8);

44
            Dataout(2)<=Data(j)(23 downto 16);

45
            j<=j+1;

46
          end if;

47
         end if;

48
         

49
count_1<=Q1;count_2<=Q2;count_3<=Q3;count_4<=Q4;

50
end process;
Attached files:
Reply Quote Edit Move Thread sperren Anmeldepflicht aktivieren Anpinnen Delete topic Thread mit anderem zusammenführen Report post
Lothar M. Moderator (Company: Titel) #7006597
Rate this post
• ▲ useful
▼ not useful 
daniel wrote:
> if(res_in = '1' or Q4=1) then
Ouch...
You will get strange effects with this here because Q4 is a variabel, 
and you can't put variables in the sensitivity list. But for 
recalculating the process a signal in the sensitivity list *must 
change*.

But at a closer look the whole sensitiviy list looks inconsistet and 
therfore the simulation must be wrong.

One of the actual problems is: you do some weird things with clocks.
1
:

2
    elsif(rising_edge(clk) and enb='1') 

3
:

4
         if(count_2=1 and rising_edge(tra))

To keep things short: "tra" for sure is not a clock!!!

A beginners design has only 1 clock: the one that is coming from the 
quartz oscillator outside the FPGA. Only on this clock a 'event or a 
risong_edge() or a falling_edge() has to be used.
Reply Quote Edit Delete Report post
Watch this topic

Reply

Note: the original post is older than 6 months. Please don't ask any new questions in this thread, but start a new one.

Formatting
  • [c]C-Code[/c]
  • [vhdl]VHDL-Code[/vhdl]
  • [code]code in other languages, ASCII drawings[/code]
  • [math]formula (LaTeX syntax)[/math]
  • [[Title]] – link to an article
  • Link to another post: right-click its post ID (#8078628), copy the address, paste it into the text

More about formatting

Post long source code as an attachment, not in the text.

Your name and e-mail address

Already registered? Log in

Not shown to anyone. We send you a link; your post appears once you confirm it there.

By submitting you create a free account and accept the terms of use.