I don’t know what’s wrong in my code especially here: sq1<=sq1; sq2<=sq2; sq3<=sq3; sq4<=sq4;
Port your code as .vhd because it is VHDL. Port the full task you have to do (complete picture). Especially figure 1 because it is mentioned in 5.
Post not port. Sorry.
Try it this way:
When you see problems with that code like signals "falling thru" then think about the behaviour of signals in processes.
: Edited by Moderator