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Forum: FPGA, VHDL & Verilog i have this school task on vhdl code using xlinx and i don't know how to fix this code.


von Hiii D. (Company: university) (souha)


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I don’t know what’s wrong in my code especially here:
sq1<=sq1;

sq2<=sq2;

sq3<=sq3;

sq4<=sq4;

von FPGA NOTFALLSEELSORGE (Guest)


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Port your code as .vhd because it is VHDL.

Port the full task you have to do (complete picture). Especially 
figure 1 because it is mentioned in 5.

von FPGA Notfallseelsorge (Guest)


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Post not port. Sorry.

von Lothar M. (Company: Titel) (lkmiller) (Moderator)


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Try it this way:
1
sq1<=sq4;
2
sq2<=sq1;
3
sq3<=sq2;
4
sq4<=sq3;

When you see problems with that code like signals "falling thru" then 
think about the behaviour of signals in processes.

: Edited by Moderator

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