I am writing a ROM vhdl code and I loaded the ROM with an MIF file. I
wrote a testbench for the ROM and I ran it on GTKWave and there was no
output when specific ROM addresses were selected.
ROM Code (rom.vhdl):
1 | library ieee;
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2 | use ieee.std_logic_1164.all;
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3 | use ieee.numeric_std.all;
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4 |
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5 | entity rom is
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6 |
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7 | generic(
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8 | addr_width : integer := 16;
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9 | addr_bits : integer := 4;
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10 | data_width : integer := 8
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11 | );
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12 |
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13 | port(
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14 | address : in std_logic_vector(addr_bits-1 downto 0);
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15 | dataout : out std_logic_vector(data_width-1 downto 0)
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16 | );
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17 |
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18 | end rom;
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19 |
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20 | architecture behavioral of rom is
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21 |
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22 | type rom_type is array (0 to addr_width-1) of std_logic_vector(data_width-1 downto 0);
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23 |
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24 | signal my_rom : rom_type;
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25 |
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26 | -- note that 'ram_init_file' is not the user-defined-name (it is attribute name)
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27 | attribute ram_init_file : string;
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28 |
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29 | -- "seven_seg_data.mif" is saved in the folder "ROM", then use "ROM/seven_seg_data.mif"
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30 | attribute ram_init_file of my_rom : signal is "romdata.mif";
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31 |
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32 |
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33 | begin
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34 |
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35 | dataout <= my_rom(to_integer(unsigned(address)));
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36 |
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37 | end behavioral;
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ROM Testbench Code (rom_tb.vhdl):
1 | library ieee;
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2 | use ieee.std_logic_1164.all;
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3 | use ieee.numeric_std.all;
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4 |
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5 | entity rom_tb is
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6 | end entity;
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7 |
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8 | architecture behavioral of rom_tb is
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9 | component rom
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10 | port(
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11 | address : in std_logic_vector(3 downto 0);
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12 | dataout : out std_logic_vector(7 downto 0)
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13 | );
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14 | end component;
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15 |
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16 | signal address : std_logic_vector(3 downto 0);
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17 | signal dataout : std_logic_vector(7 downto 0);
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18 |
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19 | begin
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20 | U0 : rom port map (address, dataout);
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21 |
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22 | stim_process : process
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23 | begin
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24 | address <= "0000";
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25 | wait for 10 ns;
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26 |
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27 | address <= "0001";
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28 | wait for 10 ns;
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29 |
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30 | address <= "0010";
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31 | wait for 10 ns;
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32 |
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33 | address <= "0011";
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34 | wait for 10 ns;
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35 |
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36 | address <= "0100";
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37 | wait for 10 ns;
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38 |
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39 | assert false report "Reached end of test";
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40 | wait;
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41 |
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42 | end process;
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43 | end behavioral;
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MIF File (romdata.mif):
1 | % romdata.mif %
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2 | % ROM data %
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3 |
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4 | % data width and total data %
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5 | width=7; % number of bits in each data
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6 | depth=16; % total number of data (i.e. total address) %
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7 |
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8 | %
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9 | format of the data and address stored in this file
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10 | uns : unsigned, dec : decimal, hex : hexadecimal
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11 | bin : binary, oct : octal
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12 | %
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13 |
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14 | address_radix=uns; % address is unsigned-type %
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15 | data_radix=bin; % data is binary-type %
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16 |
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17 | % ROM data %
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18 | content begin
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19 | [0..15] : 0000000;
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20 | 0 : 00000000;
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21 | 1 : 00000001;
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22 | 2 : 00000010;
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23 | 3 : 00000011;
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24 | 4 : 00000100;
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25 | 5 : 00000101;
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26 | 6 : 00000110;
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27 | 7 : 00000111;
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28 | 8 : 00001000;
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29 | 9 : 00001001;
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30 | 10 : 00001010;
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31 | 11 : 00001011;
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32 | 12 : 00001100;
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33 | 13 : 00001101;
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34 | 14 : 00001110;
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35 | 15 : 00001111;
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36 |
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37 | end;
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What is wrong with the code and what do I need to do to be able to
output what is stored in the memory addresses?