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Subject Author Replies Last post
warning: Static variable initialization requires explicit lifetime in this context Kevin S. 2
Serializer verilog Atalin 9
How not to fry an oscilloscope on old equipment? Barny_G. 4
Error in Loading Design NAZMUL HASAN 1
Input/feedback regarding desing using statemachine (VHDL) Lu F. 3
CodeVision AVR problem Real M. 2
identify the µC of a LCU? Michael B. 1
Gray counter verilog Gio97 6
What file suffix is usually used for the filename following a -o? Kevin S. 1
Is there anything beyond the Palnitkar book? Kevin S. 2
The use of the diode in this circuit Alex 7
LED controlling protocol like WS2812 for more colors Shum1962 4
Right shift with VHDL Alex 7
Pulse generation Lê Q. 7
Can anyone explain "cannot currently create a parameter of type" compilation error message? Kevin S. 0
In Verilog, why can't I compare my (genvar) with an integer value in my (for) loop? Kevin S. 3
Why can't I set a (genvar) outside the control section of a loop? Kevin S. 4
locked Dim LED and bicycle light John C. 1
Can a function take a boolean argument? Kevin S. 5
Is it illegal to use an (enum) as a function input? Kevin S. 0
Having trouble understanding warnings and syntax errors in my Verilog. Kevin S. 2
How do I declare a packed array in Verilog? Kevin S. 3
Implement a VHDL program using with select for PAL James 2
IEE1901 adapter for connection of a network camera via koax ThomasR 1
Cannot get icarus to recognize enum or struct. Kevin S. 2
Search for best processor long term data logging Dirk 28
Free workshop materials: Integrating ARM Cortex M Processors into Xilinx FPGAs Alex W. 6
Double registering SparkyT 4
Step-by-Step Xilinx Vitis Getting Started Guides Alex W. 0
Some huge problems paralleling MOSFETs (Linear Power Supply) Mathias 23
ISE synthesis warning changseon 1
How do I connect a battery to this step down power supply module? A. D. (WhiteKnight) 15
Booth Multiplier Verilog code not working Prabhanshu 6
Converting table files (.tbl) to vector waveform files (.vwf) for simulation. Navi 0
matlab to vhdl malak 6
locked _delay_ms() not providing a proper delay Echotwozero 12
VHDL: Synchronizing an asynchronous interface without a clock Alex K. 2
Edit/Delete message available? A. D. 0
reading BH1750 lightsensor with Atmega328P using i2c /TWI Sebastian 9
Zedboard HDMI Pradeep T. 1
MIPS implementation Konstantinos D. 0
locked How do you program arm processors? Jayesh S. 7
4Byte sequence to int Marthy .D 12
Run_length_encoding Leonardo 35
How to adjust WiFi-channel for ESP-NOW Stefan 2
VHDL Useful Templates Alexander S. 41
VHDL Seven Segment Decoder Alexander S. 43
VHDL System Reset by PLL Locked Signal Alexander S. 7
VHDL Double and Single clocks designs compare Alexander S. 13
Dueprologic Cyclone iv fpga dev board Hareesh M. 6
Dented Super Capacitors Andreas 4