matlab to vhdl

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But the Error is in the Matlab code. First write working correct Matlab 
code. If you did this, then you can generate VHDL. But first fix the 
Errors in the Matlab code.
As stated in the Error message, there is no y1 defined in your code but 
you use it.

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  • [c]C-Code[/c]
  • [vhdl]VHDL-Code[/vhdl]
  • [code]code in other languages, ASCII drawings[/code]
  • [math]formula (LaTeX syntax)[/math]
  • [[Title]] – link to an article
  • Link to another post: right-click its post ID (#8078628), copy the address, paste it into the text

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