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#6372245
Hello , I'm doing a task that got me a bit confused. So basically as you can see on the picture I converted the PLA to PAL then I wrote the logical equations for each output . (O3 O2 O1 O0) Now I want to implement a VHDL with the use of WITH select . Correct me if I'm wrong but if I want to write the VHDL program with the use of WITH select than I will need at first the truth table which contains 4 Inputs (I3, I2, I1, I0) and 4 outputs (O3, O2, O1, O0) . The problem here is that if I want to extract the truth table from the PAL or the PLA then there will be a problem . Check for example the first line of PAL or PLA : 3 Inputs are defined (I0 = 1 , I1 = 1 , I3 = 0) and one input is undefined .Their 4 outputs are (O3 = 1 , O2 =1 , O1 =0 ,O0 = 1) . In this case I can't know which state I2 will be . If I can't extract the truth table from the PAL or PLA then normally I would extract it from the logical equations but I don't know how is this possible in our case . The equations are not easy to extract to find their truth table . It's easy to extract the logical equations from the truth table and not the other way around because what I got in my case is simplfied logical equations .
