Hello , I'm doing a task that got me a bit confused. So basically as you can see on the picture I converted the PLA to PAL then I wrote the logical equations for each output . (O3 O2 O1 O0) Now I want to implement a VHDL with the use of WITH select . Correct me if I'm wrong but if I want to write the VHDL program with the use of WITH select than I will need at first the truth table which contains 4 Inputs (I3, I2, I1, I0) and 4 outputs (O3, O2, O1, O0) . The problem here is that if I want to extract the truth table from the PAL or the PLA then there will be a problem . Check for example the first line of PAL or PLA : 3 Inputs are defined (I0 = 1 , I1 = 1 , I3 = 0) and one input is undefined .Their 4 outputs are (O3 = 1 , O2 =1 , O1 =0 ,O0 = 1) . In this case I can't know which state I2 will be . If I can't extract the truth table from the PAL or PLA then normally I would extract it from the logical equations but I don't know how is this possible in our case . The equations are not easy to extract to find their truth table . It's easy to extract the logical equations from the truth table and not the other way around because what I got in my case is simplfied logical equations .

James wrote: > I will need at first the truth table which contains 4 Inputs ... > and 4 outputs (O3, O2, O1, O0) . Much easier would be to split up the output vector into 4 seperate with-select blocks: each one for O3, O2, O1 and O0 > Check for example the first line of PAL or PLA : 3 Inputs are defined > (I0 = 1 , I1 = 1 , I3 = 0) and one input is undefined > (I0 = 1 , I1 = 1 , I3 = 0) and one input is undefined That one input is not "undefined", it just "doesn't care". So check out wether your toolchain is able to handle the '-' (don't care) for synthesis. It will make things easier:

with I3&I2&I1&I0 select O3 <= '1' when "0-11", '1' when "001-", '1' when "1--0", '0' when others; |

If you can't use '-' then you will have to write the don't care by hand like that: I0=1, I1=1, I2=0, I3=0 and also the same for I0=1, I1=1, I2=1, I3=0

with I3&I2&I1&I0 select O3 <= '1' when "0011", '1' when "0111", '1' when "0010", '1' when "0011", '1' when "1000", '1' when "1010", '1' when "1100", '1' when "1110", '0' when others; |

James wrote: > If I can't extract the truth table from the PAL or PLA then normally I > would extract it from the logical equations but I don't know how is this > possible in our case . The truth table is directly and obvoiously visible in the PLA structure.

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Edited by Moderator