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Programmable logic
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Subject
Author
Replies
Last post
FPGA development resources
Andreas S.
15
2020-12-27 12:31
VHDL process issue : double execution
Sacha
17
2014-11-14 12:57
Network on chip implementation in FPGA
Bala Krishnan
2
2014-11-14 00:49
Verilog state machine query
Kenny Millar
9
2014-11-13 16:45
DE0_NANO_ADC
jeorges FrenchRivera
4
2014-11-13 11:01
function "to_integer"
Mira Miyou
9
2014-11-12 20:38
Digital to analog converter DAC and FPGA
issam sassi
0
2014-11-12 17:21
Progam in VHDL for a ttl finder
Jose Maria
0
2014-11-11 23:58
Verilog FPGA Compatibility
Charan Mehta
2
2014-11-10 18:13
32-to-1 multiplexer VHDL code simplification
Zoltan Preiner
2
2014-11-08 20:55
4-Bit Structural Adder using port map
Jay JA
4
2014-11-06 18:51
VHDL Counter Problem (Please help)
Icy Snow
2
2014-11-06 12:58
warning when synthesis
afsoon
2
2014-11-06 08:43
Error when using with-select-when in VHDL
Ayush Khemka
3
2014-11-05 07:50
Parallel MAC unit based on modified booth algorithm
Jithin Smmb
1
2014-11-03 07:57
VHDL MODEL FOR SINGLE D-TYPE LATCH WITH 3-STATE OUTPUT
Naija Coding
3
2014-11-03 07:52
modified nodal analysis
Mohammad Mothermohammad
2
2014-11-03 00:06
Basic memory unit help
Omar Rashad
2
2014-11-01 19:30
USB interface
Lukas 1e+007
8
2014-10-31 21:26
Simple 16 bit Arithmetic Unit
Omar Rashad
3
2014-10-31 21:25
Xilinx 8.1 & Xilinx 14.7 Version will not compile my design
Lewis Mbuthia
3
2014-10-30 16:20
FPGA # Processor
Itron Xtron
3
2014-10-29 19:09
16 bit PISO register
Omar Rashad
18
2014-10-29 06:37
Newbie question about 'inout'
Kenny Millar
7
2014-10-28 19:42
Two digit BCD adder
Yhx Yhx
2
2014-10-28 11:15
16 bit serial multiplier
Omar
13
2014-10-27 21:54
multiplier a matrice
Mohammad Mothermohammad
3
2014-10-27 14:43
mux using system generator
REKHA V P
2
2014-10-26 22:42
accurate counter
Mohammad Mothermohammad
3
2014-10-25 08:40
Choice of Hardware
Sunayana C.
0
2014-10-24 21:46
VHDL code help (beginner level)
Omar
6
2014-10-22 16:52
MACHXO2 - accessing Wishbone EFB i2c from Verilog?
Kenny Millar
6
2014-10-22 12:34
Using the Xilinx ISE Design Suite 14.7 version
Juan
6
2014-10-20 08:38
RS-232 communication with XUPV5-LX110T evaluation platform (Xilinx)
issam sassi
0
2014-10-16 17:07
Audio Interfacing with FPGA
Jack Born
12
2014-10-16 11:38
Algorithm for x/63 and x/127
Nikolaos Kavvadias
13
2014-10-16 11:33
Binning + Pipeline, How to do it, please?
Enrique Perez
7
2014-10-16 00:29
Display 640x480 Nexys 3 board
sketchy
8
2014-10-15 18:57
Lattice MACHXO2 EFB i2c. No activity in simulation
Antony Mathew
6
2014-10-15 09:27
SPI works sometimes
Joshua Vasquez
6
2014-10-14 08:01
VHDL code to implement a SATA disk controller on a Virtex 5 FPGA
Sunayana C.
5
2014-10-13 21:06
Using PLL in the code
Kevin
0
2014-10-09 16:35
Best FPGA setup for AES encryption
Hendrik Türk
0
2014-09-24 12:58
Addressing many registers
SparkyT
13
2014-09-23 19:54
cheap FPGA kit + camera OV7670 ?
franofcholet
1
2014-09-23 15:19
Issue with inout ports
bob
1
2014-09-22 10:40
Unit testing- too much maintenance overhead?
R L
3
2014-09-19 14:43
Communication system: Interleaver
Rob Griffin
8
2014-09-19 07:40
Calculate Sum of (z[n])^2 in VHDL
Eric Thompson
4
2014-09-19 07:36
4.3" LCD Touch Panel LTM
Dlitwp S.
5
2014-09-17 12:46
Comparision of Advantages/Disadvantges of Verilog or VHDL in Hardware verification
Jay
1
2014-09-17 02:05
Serial signal in DAC
angelo
4
2014-09-16 12:51
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