I am using a Xilinx Spartan 3E-100 Basys2 module in order to make a design corresponding to a dynamic display circuit into the ISE design suite program (14.7 version), however when generating the program file, when I start to make a synthesis of the main program and its modules it returns me two errors and It says that one of them corresponds to the part of implementation of design, and the other to the translation of the program. If someone could help me find out why this happens or what would be the typical reasons why such errors occur, it would be really helpful.
Can you reply the error code please?! It is impossible so make a remote diagnostics without knowing the full project or the error code.
Juan wrote: > why such errors occur Which one? What do you see on the "Errors" tab?
Yes, the one that is on the "Errors" tab. Also the ones that are highlighted on the image.
klick on the Error tab, so everyone (including you) sees the actual error description. And maybe you first work through some ISE Tutorials sometime...
Forgive me for the response again, well about the error it actually says: "#3/Dinamico/dinamico.ucf(22)]: NET "btn<3>" not found. Please verify that: 1. The specified design element actually exists in the original design. 2. The specified object is spelled correctly in the constraint source file".
Juan, Obviously you're lacking fundamental knowledge of FPGA development. You should find Demo-Projects for your Xilinx Spartan 3E-100 Basys2 module and use these to learn what's going on in .ucf files, during Synthesize, Translate, Map, Place&Route,... Your (current) error is, that your .ucf file tries to constrain a signal called btn<3> (probably to a PIN location or maybe a timing net). But such a signal (wire) does not occur in your code (i.e. input/output list)