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Forum: FPGA, VHDL & Verilog


Programmable logic


Subject Author Replies Last post
sticky FPGA development resources Andreas S. 15
Serial signal in DAC angelo 4
Verilog Code Help Navtej Johal 5
stop watch using verilog Prasanna M. 1
Comparator 2 Bit Question AOG 4
Time Stamping on a Nano second scale Wadood S. 10
max3420e usb Controller Rockyy Sharma 3
FPGA in CPU socket James Yunker 31
Problem in real-time data acqusition using Zest Et1 John 1
simulation to implementation, problems with the real type Louis Louis 5
Illegal recursive instantiation Iluvatar 3
Pointer std_logic_vector Kim 6
State Machine with accumulator in VHDL Sony 4
Rectangular waveform generator in the range from 0 to 10MHz. Marek 2
Simple calculator with FPGA Hosein Poorhoseini 5
hardware in loop Mohammad Mothermohammad 0
Laplacian of gaussian edge detection Mark Jomari 1
How to decide the maximum frequency on FPGA? Yang Zheng 4
vhdl test bench Rockyy Sharma 2
Need help to choose FPGA MAINUL ALAM 16
arithmetic operations between logic vectors and constants itay 1
Looking for participants in my Altera Music Project Rolf S. 0
design converter on FPGA Mohammad Mothermohammad 2
multiple connection sebgimi 7
looking for a MIPS1 multi cycle, not pipelined Legacy My 16
counter as function itay 1
capacitor in vhdl ? angelo 14
cmos camera raw interface Mark Jomari 3
Will my sonic indicator design fit in a small FPGA? Otto Hunt 1
Robert and Prewitt Edge Detection Mark Jomari 5
please help edge detection Mark Jomari 7
add and multiple integer and logic vector-VHDL Itay Fogel 3
EMULATING THE "IN SYSTEM MEMORY CONTER EDITOR" OF ALTERA QUARTUS II Enrique 8
How to code a register that will be written to by 2 hosts Ben Nguyen 3
adc-fpga interface guidelines for vhdl jeorges FrenchRivera 7
I2C vs. SPI (64 slaves) Daniel Greenheck 15
Newbie question: software speedup using fpgas Newport_j 22
multiplication real with std_logic vector sebgimi 8
FPGA for SHUNT ACTIVE POWER FILTER Rohan D. 5
2 4-bit-adder modules to make an 8-bit adder CCC CCC 6
MEGAWIZARD PLUG IN Mark Jomari 8
de1 - soc fpga Mark Jomari 3
On live data processing with Altera FPGA Cyclone IV Enrique Perez 2
cordic sincos output usage Harsha Gowda 5
Some basic fpga questions James Yunker 2
Ported linux to fpga James Yunker 8
equivalent high-Z in real? bob 2
problem with Isim simulation, I need your help Abubakar Saidu 11
problem with sinulation in ISE (FPGA) Zakariya AL-Mazroo'Ee 2
assign generic value to an output vhdl guy 4
Ethernt to USB Adapter Using FPGA Hoda Jason 2
open input vhdl bob 10