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Subject Author Replies Last post
An FPGA Wiki for Newbies MoCo Makers 0
I2C Communication for Honeywell pressure sensor Nirmit 1
library ieee; use ieee.std_logic_1164.all; Elico C. 2
JTAG C source code. USB cable Hj 27 4
avr-g++ with avr/io.h seems to hide warnings lutz_dd 1
MICRO CONTROLLR IP in the design Elico C. 2
Multiple targets flashing with openocd Odarik 0
ISE outdated ? Elico C. 2
IP core and VHDL combined ? Elico C. 0
SELF MADE IP CORE Elico C. 0
Logical case equality and inequality operators utilizing No of LUTs Lakshita J. 1
IP CORES to vhdl by xilinx ISE Elico C. 4
LOW COST BOARDS FOR Vivado Elico C. 3
Write a very simple controller for a flash memory in a IC board Pinellia Chen 0
Pulsing a pin of the PIC24F04KA201 Soumojit Bose 1
What is the effect of reducing nfft less than the signal length Usman Ashraf 2
test bench for digitAL PI controller Rock B. 0
Hardware Target shutdown problem in nexys 4 ddr Lakshita J. 6
PCI verilog code with all modules present niranjan mamadapur 2
PI loop filter in Verilog Rock B. 3
Artix-7 SPI (x4) bitstream does not work for SelectMAP (x16) St. D. 2
Generic Adder in VHDL Martin 7
DOGXL160-7 with MSP430G2452 through I2C toann 0
Smoke detector upcycling? Mike 6
VIVADO vs ISE elico 2
Deriving different clock signals from a system clock - frequency division & flags Sushma K S 2
LUT utilization is 121 % Lakshita J. 11
Synthesis doesn't match simulation Kyle Gacek 4
External oscillator on my LatticeXP2 Brevia2 Neoz 5
Phase detector in Xilinx Rock B. 23
USB Host CDC connection (to Surf Stick) on a frdmk64F (Cortex M4) Bastian S. 0
Digital Mixer implementation for DUC/DDC ATIF JAVED 2
Combinatorial logic Julian Mortimer 0
Filesystem for NOR flash Peter Ivanov 0
Want to join us? Can you develop a sleep-tracker like wearable? Alex Ander 0
Count number of more than 4 consecutive zeros Usman Ashraf 4
4-bit counter simulation problem Paolo 2
simple syntax error near clk Rock B. 11
QSPI - STM32F7 Petr Klaun 15
how to program mojo plus board with ise design Pouya Nosratkhah 1
Implement FIR filter in verilog using FDA tool Usman Ashraf 5
Help in simulating ALU with register file Fadi CPP 0
how to scale output of butterfly unit radix 2 for further stages Pravesh Rathee 2
VHDL code HELP PLZ CARL 1
RS232 from http://www.lothar-miller.de. SparkyT 1
I2C/TWI and FreeRTOS on Arduino Mega2560 / AVR Oliver G. 0
An array of std_logic_vector driven by two processes. Pablo Picasso 2
[QUESTION] Satnav firmware disassembly - help required :) RowanX 0
Quartus II connect bus to 2D array-input of block C17 3
SPI communication between two microcontrollers jeorges FrenchRivera 13
verbose output from quartus Quentin 0