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Subject
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Replies
Last post
An FPGA Wiki for Newbies
MoCo Makers
0
2018-03-06 05:55
I2C Communication for Honeywell pressure sensor
Nirmit
1
2018-03-05 21:03
library ieee; use ieee.std_logic_1164.all;
Elico C.
2
2018-03-05 12:55
JTAG C source code. USB cable
Hj 27
4
2018-03-01 23:50
avr-g++ with avr/io.h seems to hide warnings
lutz_dd
1
2018-03-01 22:50
MICRO CONTROLLR IP in the design
Elico C.
2
2018-03-01 09:39
Multiple targets flashing with openocd
Odarik
0
2018-02-28 11:24
ISE outdated ?
Elico C.
2
2018-02-27 18:08
IP core and VHDL combined ?
Elico C.
0
2018-02-27 10:20
SELF MADE IP CORE
Elico C.
0
2018-02-27 10:13
Logical case equality and inequality operators utilizing No of LUTs
Lakshita J.
1
2018-02-27 07:08
IP CORES to vhdl by xilinx ISE
Elico C.
4
2018-02-26 18:16
LOW COST BOARDS FOR Vivado
Elico C.
3
2018-02-26 18:15
Write a very simple controller for a flash memory in a IC board
Pinellia Chen
0
2018-02-26 10:28
Pulsing a pin of the PIC24F04KA201
Soumojit Bose
1
2018-02-25 18:47
What is the effect of reducing nfft less than the signal length
Usman Ashraf
2
2018-02-25 17:46
test bench for digitAL PI controller
Rock B.
0
2018-02-25 17:13
Hardware Target shutdown problem in nexys 4 ddr
Lakshita J.
6
2018-02-24 09:09
PCI verilog code with all modules present
niranjan mamadapur
2
2018-02-23 18:09
PI loop filter in Verilog
Rock B.
3
2018-02-23 17:06
Artix-7 SPI (x4) bitstream does not work for SelectMAP (x16)
St. D.
2
2018-02-23 16:41
Generic Adder in VHDL
Martin
7
2018-02-23 12:18
DOGXL160-7 with MSP430G2452 through I2C
toann
0
2018-02-23 08:45
Smoke detector upcycling?
Mike
6
2018-02-22 13:14
VIVADO vs ISE
elico
2
2018-02-22 12:00
Deriving different clock signals from a system clock - frequency division & flags
Sushma K S
2
2018-02-22 11:06
LUT utilization is 121 %
Lakshita J.
11
2018-02-21 08:47
Synthesis doesn't match simulation
Kyle Gacek
4
2018-02-20 20:01
External oscillator on my LatticeXP2 Brevia2
Neoz
5
2018-02-20 11:33
Phase detector in Xilinx
Rock B.
23
2018-02-18 13:23
USB Host CDC connection (to Surf Stick) on a frdmk64F (Cortex M4)
Bastian S.
0
2018-02-16 13:46
Digital Mixer implementation for DUC/DDC
ATIF JAVED
2
2018-02-16 11:47
Combinatorial logic
Julian Mortimer
0
2018-02-13 22:00
Filesystem for NOR flash
Peter Ivanov
0
2018-02-09 20:42
Want to join us? Can you develop a sleep-tracker like wearable?
Alex Ander
0
2018-02-09 02:46
Count number of more than 4 consecutive zeros
Usman Ashraf
4
2018-02-08 22:33
4-bit counter simulation problem
Paolo
2
2018-02-08 22:29
simple syntax error near clk
Rock B.
11
2018-02-08 14:17
QSPI - STM32F7
Petr Klaun
15
2018-02-07 13:25
how to program mojo plus board with ise design
Pouya Nosratkhah
1
2018-02-07 09:53
Implement FIR filter in verilog using FDA tool
Usman Ashraf
5
2018-02-06 12:11
Help in simulating ALU with register file
Fadi CPP
0
2018-02-06 11:05
how to scale output of butterfly unit radix 2 for further stages
Pravesh Rathee
2
2018-02-06 08:13
VHDL code HELP PLZ
CARL
1
2018-02-05 15:18
RS232 from http://www.lothar-miller.de.
SparkyT
1
2018-02-03 17:02
I2C/TWI and FreeRTOS on Arduino Mega2560 / AVR
Oliver G.
0
2018-02-02 14:25
An array of std_logic_vector driven by two processes.
Pablo Picasso
2
2018-02-01 17:40
[QUESTION] Satnav firmware disassembly - help required :)
RowanX
0
2018-01-29 20:42
Quartus II connect bus to 2D array-input of block
C17
3
2018-01-29 14:16
SPI communication between two microcontrollers
jeorges FrenchRivera
13
2018-01-29 12:34
verbose output from quartus
Quentin
0
2018-01-28 20:21
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