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Forum: FPGA, VHDL & Verilog test bench for digitAL PI controller


test bench for digitAL PI controller
von Rock B. (rocko445)

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Hello, i am trying to build a test bench for a PI conntroller based on 
the attached article.

whole code is playing with coefficient for the  last line.
how do you recooment to represent the coefficients in the testbench?

Thanks
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always #((t0-vctl*kphi)/2) vco<=~vco;



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module loop_filter(t0,clk,integral,proportional,filt_i,filt_p,vtcl,kptl,vtcl,vco);

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input t0,smpclk,integral,proportional,filt_i,filt_p,vtcl,kptl,vtcl;

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output vco;

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reg integral=4'b0;

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reg proportional=4'b0;

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always @(posedge smpclk)

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begin

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if (pdup==1'b1) begin

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  integral=integral+filt_i;

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  proportional=filt_p;

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  end

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  else if (pdup==1'b0)

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  begin

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  integral=integral-filt_i;  

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  proportional=-filt_p;

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  end

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  else begin

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         proportional=0;

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  end

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always #((t0-vctl*kphi)/2) vco<=~vco;

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end

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endmodule


  


  



  

  
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