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Subject
Author
Replies
Last post
DC-DC-Boost-Converter
x3oo
12
2020-10-25 10:07
Project announcement: EBlink free debug tool for STlinkV2/3
Gerard Z.
0
2020-10-23 10:21
Can anyone help me to solve this verilog(beginner) question or suggest me any source for solving
Omar K.
1
2020-10-22 19:19
IoT Hackathon - Integrate Everything with IOTA
DANIEL D.
2
2020-10-21 08:29
Battery Management System Design
Moi
10
2020-10-16 12:58
Index Input for Encoder Interface
SparkyT
5
2020-10-09 08:26
beginner question on gate level d flip flop simulation
Jimmy Z.
1
2020-10-09 06:18
Repalcing a 3D model connector in Altium Designer
Manjuh
6
2020-10-06 09:52
BT module RRD-305 (QCC 3005): any config info?
Josef
0
2020-10-04 11:41
ice40HX8k enable signal from clock
Fabian
1
2020-10-02 17:14
How to properly multiply signed and unsigned
signed unsigned
1
2020-10-02 09:08
AVR clock prescaler (CLKPR) and gcc code optimization
Peter-Jan Peters
13
2020-10-01 09:13
Synthesis: Mix of sync and async assignments to register
if else what when
5
2020-10-01 08:27
Microcontroller
ally
1
2020-09-30 19:54
Determining trace delay for input delay constraints
Timing violation
13
2020-09-29 10:40
SN74AHC 14 - LTspice Setup
DoKfROG
4
2020-09-28 15:35
Hardware-independent µC core?
Matthias U.
5
2020-09-26 12:10
Transistor tester program error
Cafeee S.
1
2020-09-26 01:43
Voltage drop consequences in led strips
fuberator
1
2020-09-26 00:42
Enhanced Tiger Single Board Computer
Myron P.
3
2020-09-25 04:56
Opamp in an audio circuit
Luca
20
2020-09-22 19:02
Getting to the Root Cause of BGA Assembly Problems
smartronics
1
2020-09-22 12:44
How powerful is Verilog at using parameters to specify designs?
Kevin S.
0
2020-09-22 00:21
Quiet servo Motors with high Torque
Lukas Schmidt-Wiegand
3
2020-09-21 11:04
How to read unknown SPI flash?
ATm
0
2020-09-20 17:17
warning: Static variable initialization requires explicit lifetime in this context
Kevin S.
2
2020-09-19 20:49
Serializer verilog
Atalin
9
2020-09-17 14:04
How not to fry an oscilloscope on old equipment?
Barny_G.
4
2020-09-16 18:18
Error in Loading Design
NAZMUL HASAN
1
2020-09-10 18:50
Audio audio audio, but no video?
Kraus
1
2020-09-08 20:42
Input/feedback regarding desing using statemachine (VHDL)
Lu F.
3
2020-09-07 15:48
CodeVision AVR problem
Real M.
2
2020-09-07 10:17
identify the µC of a LCU?
Michael B.
1
2020-09-06 01:05
Gray counter verilog
Gio97
6
2020-09-05 16:19
What file suffix is usually used for the filename following a -o?
Kevin S.
1
2020-09-04 01:54
Is there anything beyond the Palnitkar book?
Kevin S.
2
2020-09-02 22:18
The use of the diode in this circuit
Alex
7
2020-08-31 16:59
LED controlling protocol like WS2812 for more colors
Shum1962
4
2020-08-30 17:51
Right shift with VHDL
Alex
7
2020-08-29 16:29
Pulse generation
Lê Q.
7
2020-08-29 09:33
Can anyone explain "cannot currently create a parameter of type" compilation error message?
Kevin S.
0
2020-08-28 21:07
In Verilog, why can't I compare my (genvar) with an integer value in my (for) loop?
Kevin S.
2
2020-08-27 22:52
Why can't I set a (genvar) outside the control section of a loop?
Kevin S.
4
2020-08-27 22:45
Dim LED and bicycle light
John C.
1
2020-08-23 00:44
Can a function take a boolean argument?
Kevin S.
5
2020-08-22 22:07
Is it illegal to use an (enum) as a function input?
Kevin S.
0
2020-08-22 21:05
Having trouble understanding warnings and syntax errors in my Verilog.
Kevin S.
2
2020-08-21 03:07
How do I declare a packed array in Verilog?
Kevin S.
3
2020-08-19 17:41
Implement a VHDL program using with select for PAL
James
2
2020-08-17 01:06
IEE1901 adapter for connection of a network camera via koax
ThomasR
1
2020-08-13 06:33
Cannot get icarus to recognize enum or struct.
Kevin S.
2
2020-08-12 22:59
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