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Subject Author Replies Last post
How can I declare local variables in a Verilog task or function? Kevin Simonson 1
Opamp in an audio circuit Luca 19
Logitech G Pro X Mic not working Save_G 1
Vivado HLS experiences with Zynq boards Zoltán L. 4
Thyristor as DC switch - resitance to high Hans L. 1
Magic Pixel MP630 Datasheet or SDK Miles R. 0
New car battery Jens P. 0
Unknown logo on a diode Luca 5
Current value Measured differs form the data sheet value in Low Power Sleep Mode for STM32L433Rc-p Jojo varghese 0
SerialComInstruments Stephen A. 4
Multi flex pcb stackup Roy 1
Wordclock stopped working Sasa D. 1
text mode vga Sizeofrawdata S. 6
Anyone tried CircuitHub or Macrofab? Mikiko A. 2
Hash Code techniques Chloe H. 2
KEIL Linker Issue: LPC2148 Krishna Rao Racharla 7
Safety and security requirements? Rob T. 3
Non-Restoring Division Algorithm for Signed Magnitude Ali M. 0
updating FPGA firmware in the field Eugene 6
VHDL write to specific memory address Robert R. 2
Vhdl clockdivider Kadir A. 5
Hard Fault Error Tobias 3
Digital clock 7-seg display NEXYS-3 peterkraft 5
SMD Code "WFPP3" 3-Pin SOT-23 Stephan E. 2
VHDL Testbench Process Issue Josef F. 4
AD4001 ADC measurement configuration Codemonkey 2
sine wave in vhdl Sheikh S. 5
Transistor tester Michael W. 2
Estimated cost of high volume PCB testing Max Stell 4
How to use Altium PcbDoc with Eagle? Alex Chili 8
N samples from an ADC Aron L. 3
Testing of an Controller by simulating a load Michael H. 0
Replacing fans, attaching a resistor in parallel Calculating a resistor size for given power 3
clocking module in vivado? Flat B. 1
what kind of memory should i use? Flat B. 5
Write in a file with verilog XaBla 2
Communicate TRX moduls and sensor Samira T. 0
Transistor Tester Compiling Error rufooth 0
PT2033 audio processor: I2C protocol Matthias Larisch 4
help writing testbench for uart mike 6
How can I add the status of lights “red-yellow” in Verilog Michał W. 1
Reusing registers in VHDL FSM code Darian Reyes 3
Bootstrap-circuit Alex A. 2
Keypad saved shifting display in Verilog Cm Y. 0
Evaluate two signals -- Change input Timer 1 Source between T1 and T0 Florian M. 2
10 PCB Service Company From China Jack W. 3
Modularly composed BMS - looking for good ICs muhkuhµc 1
register clear on read vhdl 3
Compiling for transistor tester - 1.34m Robert 3