2 4-bit-adder modules to make an 8-bit adder

CCC C. (mcg) OP 2014-07-04 20:24 #3714036

I have a problem with this question. I need these project and I will use 
just the main file. Is there anybody who will help me ?
Thanks ?

Question:
main file in which you use 2 4-bit-adder modules to make an 8-bit adder

Reply Quote Edit Move Thread sperren Slow mode Anmeldepflicht aktivieren Anpinnen Delete topic Thread mit anderem zusammenführen Report Thanks

Lothar M. (lkmiller) Moderator (Company: Titel) 2014-07-05 07:36 #3714253

Show what you have done and point out the problem with it. Then maybe 
one will help you with your homework. At least we could see, which HDL 
you address...

Reply Quote Edit Delete Report Thanks

CCC C. (mcg) OP 2014-07-05 11:34 #3714369

I have these 2 4-bit's adder module. How can I combined and merged these 
in main file for obtain 8-bit adder ?

Attached files:

adder.v (809 Bytes)
adder1.v (810 Bytes)

Reply Quote Edit Delete Report Thanks

Lothar M. (lkmiller) Moderator (Company: Titel) 2014-07-05 12:51 #3714436

CCC CCC wrote:
> I have these 2 4-bit's adder module.
Whats the difference between them?
As far as I can see both of those modules are similar 1 bit full adders. 
So you must chain up 8 of them to get the desired 8 bit adder.

Reply Quote Edit Delete Report Thanks

TB Guest 2014-07-05 13:15 #3714459

Is this code even compiling without declaring S and Cout as "reg"? 
Anyhow at best, these are one bit full adders, as already mentioned by 
Lothar.

Reply Quote Edit Delete Report Thanks

CCC C. (mcg) OP 2014-07-05 18:25 #3714708

How can I obtain 8Bit full adder from 2 4-bit full adder ?
I found this code for 4-bit full adder and I tried to combined them but 
i didn't do this.
module fullAdder(
         input a,
         input b,
         input cin,
         output s,
         output cout );

        assign {cout,s} = a + b + cin;

endmodule

Could you help me how can I obtain this ?

Reply Quote Edit Delete Report Thanks

bko Guest 2014-07-06 10:18 #3715081

how to connect instantiated modules by name:
http://www.asic-world.com/verilog/syntax2.html

e.g a two bit adder:

module adder_2bit(
         input [1:0] abus,
         input [1:0] bbus,
         input cin,
         output [1:0] sumbus,
         output cout );
  wire ctemp1;
   fullAdder u0 (
           .a(abus[0])      ,
           .b(bbus[0])      ,
           .cin(ci)      ,
           .sum(sumbus[0])    ,
           .cout(ctemp1)
   fullAdder u1 (
           .a(abus[1])      ,
           .b(bbus[1])      ,
           .cin(ctemp1)      ,
           .sum(sumbus[1])    ,
           .cout(cout)
endmodule

Reply Quote Edit Delete Report Thanks

Watch this topic

Reply

A question of your own? This thread is over 12 years old. Ask it in a thread of its own – more people read along there, and it gets answered more often and sooner.

Start a new thread

A fix, an addition or feedback on this thread? Then reply here.

Text *

Formatting

[c]C-Code[/c]
[vhdl]VHDL-Code[/vhdl]
[code]code in other languages, ASCII drawings[/code]
[math]formula (LaTeX syntax)[/math]
[[Title]] – link to an article
Link to another post: right-click its post ID (#8078628), copy the address, paste it into the text

More about formatting

Attachments

Post long source code as an attachment, not in the text.

Your name and e-mail address

Already registered? Log in

First name *

Email address *

Not shown to anyone. We send you a link; your post appears once you confirm it there.

Watch this topic

By submitting you create a free account and accept the terms of use.