Hi everyone!

I want to multiply a std_logic_vector value (14 bits) with a real 
number.
But there is a problem of size of data I think. The compiler show me 
these errors: "operator argument type mismatch"

Below the part of code I wrote:

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data <= data * std_logic_vector(to_signed(integer(1.5*8192.0),data'length))

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               when VREF_ADC_COM_value = 0.6 else

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        data * std_logic_vector(to_signed(integer(1.2*8192.0),data'length))

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               when VREF_ADC_COM_value = 0.75 else

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        data;

How can I fix it ?

Thank you!

Yes it's only for simulation.

The libraries I use:

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

Lothar Miller wrote:
> BTW: What data type is data?

data is a std_logic_vector(13 downto 0)

So, do I have to create an other signal "data unsigned" to use in the 
multiplication?

Like this:

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signal data          : std_logic_vector(13 downto 0);

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signal data_unsigned : unsigned(13 downto 0);

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data_unsigned <= data_unsigned * unsigned(integer(1.5*8192.0),data'length))...

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data <= std_logic_vector(data_unsigned);

I'm a little bit lost with all these types...

Lothar Miller wrote:
> But why not definig data itself as a signed vector?
> The result of a vector multiplication is twice the with of a single
> vector (or the sum of the bits of both).
>
> I would do the calculation in integer. Then you don't have to hassle
> aruond with vector lengths: data <=
> std_logic_vector(to_signed(to_integer(signed(data)) *
> integer(1.5*8192.0), data'length));

So, if I understand right, I have to declare data as a signed vector of 
28 bits and write the line of calculation above ?