please help edge detection

Moderator (Company: Titel) 
Mark Jomari wrote:
> why this is happening?
What happens and what did you expect instead?
What way do you get from one to the other?

Read your own post as everybody here must read it: without ANY knowledge 
about your problem. You will see: nobody cannot understand anything!


And: what has your problem to do with FPGAs, Asics or other programmable 
logic?
If so: what platform? What hardware? What toolchain?
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Guest 
Mark Jomari wrote:
> im sorry,. what i mean is,. on the left side is the sobel edge
> detection, and on the right side is the grayscale input,,
> ,. why the output looks like that?

The output looks like it looks, because you applied what you applied. 
:-)


Once again. Read your question and consider what a reader must know in 
order to help you.

So, what do you expect and in which specific does it deviate from what 
you get?
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Guest 
Hmmm,

you have a "shadow"

wrong double/buffering ??

or you have only one buffer for input and output.
This is wrong.
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OP 
i think so,. because in my simulation in modelsim, the result of the 
sobel edge detection takes 7 posedge clk before getting the magnitude,, 
how can i control the delay of the output of vga,?
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Guest 
that cannot be the reason for these double image one can see in your 
examples. this is either a sobel filter issue or something else.
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