Will my sonic indicator design fit in a small FPGA?

Otto H. OP (Company: Imagine What Could Be) #3738327
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I have attached a signal flow chart of a sonic indicator. A set of four 
harmonically related tones are generated and mixed within the FPGA. 
Those tones rise or fall in response to a pulse-width change at the 
input. This tonal information is output via I2C.

A second I2C output contains the magnitude of input change, which is 
used to control volume.

This is a battery powered application, so I would like to use the 
smallest chip I can get away with. Thanks.
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