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Subject Author Replies Last post
Verilog buffer implementation problem H Karim 1
Implement filter in verilog Qq Qq 1
USB Logic Analyzer Mayank Chaudhary 4
CORDIC(Coordinate Rotation Digital Computer) CJU 3
troubles with VHDL testbench in Modelsim Dima Ustinoff 1
General variables Antonio Angelino 0
LUT in verilog Antonio Angelino 4
Linking libspeeex in coocox Shashi Abd 1
parallel data into serial rushin 1
Can't understand Verilog arithmetics Ubix2014 2
WS2000 Regenmesser Lupo01 1
VHDL with ModelSim and Quartus II Rogério Clynton Ribeiro 0
locked GCC ARM Embedded -> Compiler bug! Dereferenzing of Pointers. Ma Hi 2
VHDl for a custom CLB Johnny 0
Proof of concept: ATmega MP3 decoder Horst 1
STM32F0 and 1Mbit EEprom Jens Wörmann 0
Hello world on Atlys Spartan-6 xc6slx45 Slim Hmidi 3
Problems in constraining Negative setup slack Glen 3
lpc2148 and uart Ranjeeth P t 4
Basic Question Elena Cososchi 2
control logic for memory selection felix89 2
OV7670 camera in VHDL jeorges FrenchRivera 6
Multiple posedges in sensitivity list Joe 6
VHDL calculator matrix input help. ed jones 1
Limit current of L6206 Bridge Driver Torsten 5
Please help me in writing correct verilog test bench code for parallel crc32 with 32 bit data width Ajit Sinam 2
Arcade Centipede Game in Verilog Asiong Martinez 11
Bitwise OR of std_logic_vector Hamidreza Ahmadian 2
Inertial sensors not giving updated values Aditya K. 0
STM32F401RE GPIO Asiong Martinez 0
problem in 2d- dct computation Ajay Mittal 1
SAM7-EX256 - /bin/sh: arm-elf-as: command not found Roslan Hristov 0
FATAL_ERROR: Iteration limit 10000 is reached Rohan Narkhede 7
DCT code. Don't know why it is not working. Ajay Mittal 2
recommend me an FPGA card for networking Nulik Nol 4
User Flash Memory, Machxo2 7000HE breakout ChrisChris 2
watermarking on FPGA Hamid Kavian 3
GPS to FPGA to PC Yuniarto Wimbo Nugroho 9
shift left or shift right deepak singh 9
Altium (SVN)DbLib Add/Edit Component in Altium Martin 6
Which step up converter to choose for a fixed Vout independent from Vin Jens Strümper 4
Please Help! Not gate implementation nand Mihai Marius 2
Timing Requirements - Worst case Removal Slack Bryan 1
Interfacing FPGA with Global shutter camrea Mike 5
Openning Serial port - AT91SAM7S265 Shira Meltzer 0
MAC Adresses - sort of refund for shredded Computers? [VSOP]Chateau-Migraine 1
Need help running SSD1322 with ER-OLEDM032-1 OLED Alex Lynchosky 6
GUI for Raspi and Python to deliver Instrument panels Hellmut Kohlsdorf 0
Blocking cammand Implementation Question guitardenver 9
Bandpass Filter Walid Whx 1
Serial data to OBD2 Pezi 0