Bitwise OR of std_logic_vector

Hello,

Suppose we have 4 buffer, each has a single bit which indicates if the 
buffer is empty and we connect this pin to the bellow signal.

signal buffer_empty       : std_logic_vector (3 downto 0);

Each bit of the above signal indicates whether the corresponding buffer 
is empty or not and the below signal indicates whether we have an empty 
buffer al all.

signal any_buffer_empty   : std_logic;

The second signal can be assigned as follows:

any_buffer_empty <= buffer_empty (0) and buffer_empty (1) and 
buffer_empty (2) and buffer_empty (3);

Now the problem gets difficult for me if the number of buffers is 
parameterized (by a generic or constant like NR_BUFF) and I cannot 
figure out how to calculate the second signal in this case.

Thanks in advance,
Hamid