Forum: FPGA, VHDL & Verilog DCT code. Don't know why it is not working.

Author: Ajay Mittal (Guest)
Posted on:
Attached files:

Rate this post
0 useful
not useful
One file is vhdl code another is testbench code.
It is program for DCT(Discrete cosine transform).
Assumed to take eight 16 bit inputs in first 8 clock cycles and in the 
coming 8 cycles eight 16 bit output y will come.
but at present no output is coming.
Please neglect logical mistakes. Only help me with syntax or other 
Its urgent so please help me out guys.

Author: adelheit (Guest)
Posted on:

Rate this post
0 useful
not useful
I see only your testbench.

You can make your coad also visible with some tags.
VHDL code

Author: Lothar M. (lkmiller) (Moderator)
Posted on:

Rate this post
0 useful
not useful
adelheit wrote:
> I see only your testbench.
2 times the same? And not much in it...

> I see only your testbench.
And pls attach *.vhd or *.vhdl files!
Not *.txt files.
Then you will see some kind of magic named "syntax highlighting"...


Entering an e-mail address is optional. If you want to receive reply notifications by e-mail, please log in.

Rules — please read before posting

  • Post long source code as attachment, not in the text
  • Posting advertisements is forbidden.

Formatting options

  • [c]C code[/c]
  • [avrasm]AVR assembler code[/avrasm]
  • [vhdl]VHDL code[/vhdl]
  • [code]code in other languages, ASCII drawings[/code]
  • [math]formula (LaTeX syntax)[/math]

Bild automatisch verkleinern, falls nötig
Note: the original post is older than 6 months. Please don't ask any new questions in this thread, but start a new one.