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#4461030
One file is vhdl code another is testbench code. It is program for DCT(Discrete cosine transform). Assumed to take eight 16 bit inputs in first 8 clock cycles and in the coming 8 cycles eight 16 bit output y will come. but at present no output is coming. Please neglect logical mistakes. Only help me with syntax or other mistakes. Its urgent so please help me out guys.