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Forum: FPGA, VHDL & Verilog


Programmable logic


Subject Author Replies Last post
sticky FPGA development resources Andreas Schwarz 10
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Flash Memory Christin Kimeri 2
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remains a black-box since it has no binding entity Kim 5
tdo pin damagement vr7 0
HELP! Programming of DE2 Altera Board. Afkar Osman 4
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LED intensity change by press LED intensity change by press 6
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VHDL process with Sync. & Async. Reset St. D. 4
How to perform division of two Q15 values in Verilog , with out using '/' (division) Operator? Mog4kor Kumar 5
i got a problem krishna raj 4
Implementing VHDL FSM in Quartus with “couldn't implement registers for assignments" freq_met Rafal Och 1
I2C ACK bit Verification on Spartan 3-E Spartan_Newbie 3
Simple program Kam Smith 3
VGA signal generation Nikolay 3
Matrix creation in VHDL martin49 1
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biphasic waveform Bose Chandran 4
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Debugging with the J-Link Debugger and a CycloneV SoC Michael Fischer 0
Signals are not getting U value Tammy 3
Error in my program ayr 5
Digital IC Design with VHDL Ho Oanh 5
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Code for my project Sukhmani Kaur 4
Modelsim simulation OK but FPGA implementation incorrect!! Omar 8
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Multiple Driver Nets _segmento{OBUF[0] ricardo 8
delayed copy of an asynchronous signal in Spartan 6 Mo Zangeneh 2
read/write from dual port ram Uzair Memon 1
Adding Buffer to input Uzair Memon 1