Hi, im trying to connect a FPGA (Altera DE0) via i2c to a mikrocontroller (Arduino, RaspberryPi, etc ...) using copencores i2c-core. I programmed already the toplevel for the i2c-core with VHDL to write from the FPGA via the i2c bus to the mikrocontroller. (FPGA is the master and the mikrocontroller on the other side the slave) The problem: I cant see any signal on the clock line and also on the data line with the oscilloscope. Im 100% sure that the pinassignment ist correct. Can someone look over my code to detect the problem? I have no idea what the problem is. Im new to VDHL maybe I did something wrong. The code I programmed: i2c_controller_top.vhd and writeDummy.vhd Thanks
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ki92 wrote: > I have no idea what the problem is. Did you simulate your text files? What's the result of that simulation?
Hi, Do you still need help on this? I just completed a small design using the same I2C core and noticed that it harbours a few "gotchas": * The core's signal initialization is not completely defined, which mandates an external reset * The core can be used either with an asynchronous or synchronous reset, the active level for the latter is defined through generic ARST_LVL that defaults to '0'. Check the reset level to which rst_i is tied in your design * The first emission after reset is always truncated - it will miss the address part. * signal wb_we_i (write enable) is not registered in the core module - you might need to hold this signal for a longer period than you think Also, before enabling the core by setting EN to '1' in the control register, you need to program the required I2C clock frequency (clock prescale register) according to the formula given in the documentation. I am not familiar with the reset/start behaviour of your particular device, you might also need to add a reset generator to your design.