hey, I've a verilog code for an 8b/10b encoder and decoder circuit used in usb 3.0 verilog implementation. Will someone tell me the logic of this code segment? And if I could get the Testbench of this code it would have been more helpful. I am currently running it on ALTERA Modelsim 6.6 stater edition. According to the compiler I could run the program without any errors But I couldn't get the waveform done. Thanx in advance.
Priyanga M. wrote: > i want Testbench for 8b/10b encoder verilog code ? Is this homework? In real life it ist that way: you eat in a restaurant and then you pay for it. How much would you pay here to those doing your work? Lets try it the other way: YOU start with something. And when a specific problem occurs, THEN you ask a question how to solve that problem. And then maybe one spends his leisure time to HELP you. Got it?
sir,please help me in 8 to 10 bit encoding iam getting wrong output for two input combinations
seshasai wrote: > iam getting wrong output for two input combinations Three Things: 1. for a new question start a new thread. 2. what do you expect and what do you get instead? 3. attach *.v instead of *.v_ files!
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Edited by Moderator
for input 8'b00011011,KI=1'b0 iam getting o/p==10'b1101110011 and for i/p=8'b10101110, KI=1'b0 o/p=10'b1011011101. the o/p is having running disparity=+4 but the running disparity should be +2 or -2 or 0.
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