Hi @ all,
Im working with the student version of Modelsim, I have dowloaded the
latest version (6.5b) and the licence and copied it to the root
folder(C:\dev\Modeltech_pe_edu_6.5b).
Now to the problem:
Im using "vsim -voptargs=+acc work.tdm_bert_tb" as my run command.
My only error report is:
#Error loading design
Due to the limited content of the error msg I have difficulties finding
a solution.
What have I already done:
I have reinstalled Modelsim + licence with Administrator rights, tried
running it with different -commands e.g. vsim -optargs work.tdm_bert_tb,
vsim work.tdm_bert_tb (none).
I only recieve the above mentoinened error.
Any suggestions are welcome.
Thanks in advance.
Kel.
Hi supachris,
thx for the hint but the only error line I recieve is the "#Error
loading design" line and no other output. This is the fact that keeps me
from investigating further.
I am getting the error "Error Load Design"(Modelsim student version).
I have three modules and all are compiling without errors.
However,the order for one of them (test bench) stays '0' in the left
window.
Now,while trying to run the three modules,I was getting the error which
I have specified above.
Make sure that your PDF student license is contained in the
C:\Modeltech_pe_edu_10.0c' directory folder only( i.e. is not contained
in any subfolders, the 'win32pe_edu' folder in particular!). I tried
this before and it cured the #Error loading system# for me when it
appeared!
I hope this will cure some headaches aswell!
Regards,
Sentinel.
Hi,
I just had the same error message myself
and this is how I fixed it
#Error loading design
- Check your license is not in a sub folder especially 'win32pe_edu' in
the ModelSim directory
- and then check your "tb" design to see if your "module" and "uut" name
are one and the same for example mine was
module tb_ex1_gate();
and
ex1 uut
This led to the error "#Error loading design" because ModelSim could not
find it in the libraries, it should have been
module tb_ex1_gate();
and
ex1_gate uut
also when the this error appears you can find more detail when you
scroll up on the Transcript section
I hope all this helps I am using ModelSim PE Student Edition 10.0c
Guys I solved my problem!
But first lets describe the problem
I was building a half subtractor using structural modelling. One of the
components used a not gate and I named the component "NOTGATE", which
was okay since it compiled peacefully.
But when i simulated the entity, an error occurred that said "Error
loading Design".
I ran a google search and stumbled here. The guy named Christian on this
post pointed out to check the lines above the error "FATAL...". Thanks
christian!
I checked mine out and it said that the "entity" NOTGATE was causing
problem which was in the same folder as the entity of half subtractor. I
checked the folder and I remembered "Oh yeah! I had once made that
entity (practicing you know!)." So i went back to my program and renamed
the component NOTGATE as NOTG. Simulated it and it executed without a
problem!
<Conclusion:
1. Read the whole error message not just the error line!
2. Always try to use unique identifiers in you program :/
hi I have same Error which is error loading design
there is no any problem in my code also the licen. file was downloaded
in my computer but i dont know the problem that make my modelsim doesnot
run the code is there any one has the solve thanks
> there is no any problem in my code
You seem to be very confident about that. What gives you that certitude?
>> The guy named Christian on this post pointed out to check the lines>> above the error "FATAL..."
What error messages do you get previous to the fatal error?
This do not solve my problem...
# Compile of TB_Add1b.vhd was successful.
# Compile of Add1b.vhd was successful.
# Compile of config_Add1b.vhd was successful.
# 3 compiles, 0 failed with no errors.
ModelSim > vsim -voptargs=+acc -t ns work.cfg_test
# vsim -voptargs=+acc -t ns work.cfg_test
# Error loading design
hi,
i got the same error and i saved the license file in
C:\Modeltech_pe_edu_10.4a . it would be very helpful if anybody let me
know wht should i do to remove this error
Hello. This is my code of full subtractor using 2 half subtractors. No
error in compiling. but there is this error will simulating the program:
Port w and d are not found in the connection module.
module hs(diff,borrow,a,b);
output diff,borrow;
input a,b;
assign diff= a^b;
assign borrow= ~a&b;
endmodule
module fs(diff,borrow,a,b,cin);
output diff,borrow;
input a,b,cin;
wire [1:0]w,d;
hs a1(.w(w[0]),.a(a),.d(d[0]),.b(b));
hs a2(.a(d[0]),.d(d[1]),.b(cin),.w(w[1]));
assign diff=d[1];
assign borrow= w[0] | w[1];
endmodule
I will be obliged if you could help.
Here's another thought....
I had this problem after moving a simulation folder containing all my
verilog and project files. After opening the project file (*.mpf) in a
text editor, I found all verilog files were described with absolut path
names, NOT relative path names. A simple find & replace to correct the
path would fix it!
Joseph wrote:> Here's another thought....>> I had this problem after moving a simulation folder containing all my> verilog and project files. After opening the project file (*.mpf) in a> text editor, I found all verilog files were described with absolut path> names, NOT relative path names. A simple find & replace to correct the> path would fix it!
This is the correct fix for most of these errors. It's another one of
ModelSim's wonderful "quirks", of which there seem to be an infinite
amount!
* Error: (vsim-3053) C:/Users/Uzma/Desktop/fedup/fsm_tb.v(9): Illegal
output or inout port connection for "port 'out'".
#
Plz help as i dont understand the meaning of this error.. output port
has been clearly identified but still its not loading the file...
************************************************************************
*
Author: Sentinel (Guest)
Posted on: 2011-10-06 17:15
Make sure that your PDF student license is contained in the
C:\Modeltech_pe_edu_10.0c' directory folder only( i.e. is not contained
in any subfolders, the 'win32pe_edu' folder in particular!). I tried
this before and it cured the #Error loading system# for me when it
appeared!
I hope this will cure some headaches aswell!
Regards,
Sentinel.
************************************************************************
*
Sentinel
YOU ARE A GENIUS !
COOL!
Maybe somebody already mentioned it but just to be sure, after you've
saved the license file in the right directory as described in previous
posts, close ModelSim and then try again to simulate because otherwise
the error won't disappear
i am keep on getting error loading design error after when i click on
simulate
i have tried some things
but i was not able to correct
could someone explain it briefly how can i solve this problem
My code has been compiled successfully but on simulating the following
error is shown. Please help in rectifying the error.
vsim -gui work.half_adder
# vsim
# Start time: 21:24:16 on Oct 13,2018
# Error loading design
Checks: 1.student license must be in the same folder of ModelSim
2.If not cut and paste it.
3.run the simulation
If you have done above things but still getting same.Then
Uninstall ModelSim and again reinstall it.
My work library will not work proper.when i will compile it will add
another work library in compile and show the work library empty.Anyone
can tell me the problem.
I had the same problem for almost 2 months now. This is how i solved it:
For those trying gate level simulation and using a sdf file along with
it, you must also compile the sdf file. But it not like compiling any
other file. You must use the command sdfcom. Also when using this
command, you must also specify the sdo file name as input, and a new
file name that will be used as output file. So the syntax goes like:
sdfcom [ options ] source-file output-file
This might help some people.
I am using Modelsim FPGA Starter version 10.5b
Thanx
hi,
i am even getting same erroe and in the blue line it's written
( Error: (vsim-3173) Entity
'C:/Modeltech_pe_edu_10.4a/CourseraFPGA/Course2/AAC2M1P1/work.comparator
2' has no architecture)
Please suggest what should i do.
Hi,
I am getting error due to loading design and the reason given is
"comparator 2 has no architecture".Please help me out.I had attached the
file also'
# vsim
# Start time: 11:53:42 on Oct 20,2020
# Error loading design
this is the error that keeps showing when i try to simulate my codes
module bufif_notif_gates (output c,d, input a, b);
bufif1 (c, a, b);
notif1 (d, a, b);
endmodule
module bufif_notif_gates_tb;
reg tb_a, tb_b;
wire tb_c, tb_d;
bufif_notif_gates_tb Instance0 (tb_c, tb_d, tb_a, tb_b);
initial begin
tb_a = 0; tb_b = 0;
#1 tb_a = 0; tb_b = 1;
#1 tb_a = 1; tb_b = 0;
#1 tb_a = 1; tb_b = 1;
end
initial begin
$monitor ("T=%t| a=%b |b=%b| c(bufif)=%b |d(notif)=%b", $time, tb_a,
tb_b, tb_c, tb_d);
end
endmodule
this is my code. i don't know how to fix this :(
You need three steps to simulate in modelsim:
1. create library:
vlib work
2. compile all design files (and the testbench!) into the library (work
is the default):
vlog my_design.v
vlog my_testbench.v
3. start simulation:
vsim -gui my_testbench
That's it.
Duke
anusha wrote:> # ** Error: (vsim-3033) C:/Modeltech_pe_edu_10.4a/examples/TB_310.v(13):> Instantiation of 'moore1101' failed. The design unit was not found.
How does line 13 of TB_310.v look like?