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Forum: FPGA, VHDL & Verilog Altera Cyclone IV Internal Memory - ROM: 1-Port Problem


Author: Adrian H. (adrian3)
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Hi,

I have created a MIF file containing 100 x 16bit values. The values 
point to a colour palette which contains the RGB values for 10 colours.

In Quartus Prime Lite I have used the IP Catalogue to create a ROM: 
1-Port file

My top Verilog HDL file references the ROM file which when compiled / 
simulated on the FPGA development board should produce a 10 coloured 
stripped square (10 x 10 pixels) on the attached monitor. However, all I 
get is a blue square.

Could you please help me with where my code is going wrong. After I 
compile the design the total memory bits states 4 / 423,936 ( < 1 % ), 
which I believe is not right for the size of the data I am trying to 
place in the ROM memory.

I have attached the files for my design (in .txt format). Please ignore 
the 640x480 file name references, it should actually be 800x600

Author: Duke Scarring (Guest)
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Did you have a suitable testbench?
For VGA output a very simple testbench need only a clock signal.
It is helpful to simulate a complete frame (around 16.6 to 20 milli 
seconds).

Duke

Author: Adrian H. (adrian3)
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Many thanks for the reply.

I do need to start using a testbench. Looked at it when I first started 
with FPGA (couple of months ago), but could not really find any good 
websites to show me how to go about using them in Quartus Prime Lite. 
Now I have a bit more knowledge about FPGA's it would be really 
beneficial to get my head round it.

Meanwhile. I have amended my top module to;

`timescale 1ns / 1ps
module VGA640x480(clk, reset, red, green, blue, vsync,hsync);
input clk,reset;
output vsync,hsync;
output reg [4:0] red;
output reg [5:0] green;
output reg [4:0] blue;
reg [10:0] AH_SIZE=50;
reg axdir=1;
reg aydir=1;
//-------------------------------
// Load Spriterom from Internal
// Memory ROM: 1-Port
//-------------------------------
reg [6:0] address;
wire [15:0] q;
Spriterom u1(
 address,
 clk,
 q);
initial address=0;

//-------------------------------
// VGA 800x600 Horizontal Values
//-------------------------------
parameter HTOTAL=1040;
parameter HZSYNC=120;
parameter HBACK_PORCH=64;
parameter HACTIVE=800;
parameter HFRONT_PORCH=56;
reg [10:0] H_SCAN;
reg HPOLARITY;
//-----------------------------
// VGA 800x600 Vertical Values
//-----------------------------
parameter VTOTAL=666;
parameter VTSYNC=6;
parameter VBACK_PORCH=23;
parameter VACTIVE=600;
parameter VFRONT_PORCH=37;
reg [10:0] V_SCAN;
reg VPOLARITY;
//-----------------------------
// Load palette
reg [15:0] pal_memory [0:29]; //16 bits wide: 3 (R G B) x 10 colours = 
30
initial $readmemh("Pal.txt", pal_memory);
//-----------------------------
// Horizontal Timings
//-----------------------------
always@(posedge clk)
begin
 //Horizontal Sync
 if(H_SCAN < HZSYNC)
  HPOLARITY <= 0;
 else
  HPOLARITY <= 1;

 //End of line
 if(H_SCAN == HTOTAL)
  H_SCAN <= 0;
 else
  H_SCAN <= H_SCAN + 1'b1;
end
assign hsync = HPOLARITY;
//-----------------------------
// Vertical Timings
//-----------------------------
always@(posedge clk)
begin
 //Vertical Sync
    if(V_SCAN < VTSYNC)
  VPOLARITY <= 0;
 else
  VPOLARITY <= 1;
 //Bottom of screen
    if(H_SCAN == HZSYNC + HBACK_PORCH + HACTIVE)
  if(V_SCAN == VTOTAL)
   V_SCAN <= 0;
 else
  V_SCAN <= V_SCAN + 1;
end
assign vsync = VPOLARITY;

always@(posedge clk)
begin
 if((H_SCAN > HZSYNC+HBACK_PORCH) && (V_SCAN > VTSYNC+VBACK_PORCH) && 
(H_SCAN < HZSYNC+HBACK_PORCH+HACTIVE+1) && (V_SCAN < 
VTSYNC+VBACK_PORCH+VACTIVE+1))
  begin
   if((H_SCAN > HZSYNC+HBACK_PORCH+100) && (V_SCAN > 
VTSYNC+VBACK_PORCH+50) && (H_SCAN < HZSYNC+HBACK_PORCH+110+1) && (V_SCAN 
< VTSYNC+VBACK_PORCH+60+1))
    begin
     red <= pal_memory[q*3]>>3;
     green <= pal_memory[(q*3)+1]>>2;
     blue <= pal_memory[(q*3)+2]>>3;
     address <= address + 1;
     if(address == 100)
      address<=0;
    end
   else
    if((H_SCAN > HZSYNC+HBACK_PORCH+100) && (V_SCAN > 
VTSYNC+VBACK_PORCH+70) && (H_SCAN < HZSYNC+HBACK_PORCH+110+1) && (V_SCAN 
< VTSYNC+VBACK_PORCH+80+1))
    begin
     red <= 0;
     green <= 255>>2;
     blue <= 0;
    end
   else
    begin
     red <= 0;
     green <= 0;
     blue <= 0;
    end
  end
else
  begin
   red <= 0;
   green <= 0;
   blue <= 0;
  end
end
endmodule

This draws a coloured square on the VGA monitor but the image is rolling 
to the right quite quickly (within the 10x10 pixel area). I have also 
added a green square below this as a comparison (both squares are the 
same size).

The rolling square appears to only have 3 or 4 colours.

I have initially set address = 0, as the first value is at address 0 (0 
to 99).

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