-- Copyright (C) 2018 Intel Corporation. All rights reserved. -- Your use of Intel Corporation's design tools, logic functions -- and other software and tools, and its AMPP partner logic -- functions, and any output files from any of the foregoing -- (including device programming or simulation files), and any -- associated documentation or information are expressly subject -- to the terms and conditions of the Intel Program License -- Subscription Agreement, the Intel Quartus Prime License Agreement, -- the Intel FPGA IP License Agreement, or other applicable license -- agreement, including, without limitation, that your use is for -- the sole purpose of programming logic devices manufactured by -- Intel and sold by Intel or its authorized distributors. Please -- refer to the applicable agreement for further details. -- Quartus Prime generated Memory Initialization File (.mif) WIDTH=16; DEPTH=100; ADDRESS_RADIX=UNS; DATA_RADIX=UNS; CONTENT BEGIN 0 : 00; 1 : 05; 2 : 01; 3 : 02; 4 : 08; 5 : 09; 6 : 07; 7 : 06; 8 : 03; 9 : 04; 10 : 00; 11 : 05; 12 : 01; 13 : 02; 14 : 08; 15 : 09; 16 : 07; 17 : 06; 18 : 03; 19 : 04; 20 : 00; 21 : 05; 22 : 01; 23 : 02; 24 : 08; 25 : 09; 26 : 07; 27 : 06; 28 : 03; 29 : 04; 30 : 00; 31 : 05; 32 : 01; 33 : 02; 34 : 08; 35 : 09; 36 : 07; 37 : 06; 38 : 03; 39 : 04; 40 : 00; 41 : 05; 42 : 01; 43 : 02; 44 : 08; 45 : 09; 46 : 07; 47 : 06; 48 : 03; 49 : 04; 50 : 00; 51 : 05; 52 : 01; 53 : 02; 54 : 08; 55 : 09; 56 : 07; 57 : 06; 58 : 03; 59 : 04; 60 : 00; 61 : 05; 62 : 01; 63 : 02; 64 : 08; 65 : 09; 66 : 07; 67 : 06; 68 : 03; 69 : 04; 70 : 00; 71 : 05; 72 : 01; 73 : 02; 74 : 08; 75 : 09; 76 : 07; 77 : 06; 78 : 03; 79 : 04; 80 : 00; 81 : 05; 82 : 01; 83 : 02; 84 : 08; 85 : 09; 86 : 07; 87 : 06; 88 : 03; 89 : 04; 90 : 00; 91 : 05; 92 : 01; 93 : 02; 94 : 08; 95 : 09; 96 : 07; 97 : 06; 98 : 03; 99 : 04; END;