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Forum: FPGA, VHDL & Verilog time duration for every key in keyboard


Author: ahmedhassan (Guest)
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hi
i want a vhdl code to compute the time duration for every keystroke in 
the keyboard take to pressed or released .any help plz

Author: Bitflüsterer (Guest)
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>any help plz

It would be a pleasure for us.
Please provide details about your specific question and/or your code so 
far.

Author: ahmedhassan (Guest)
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Bitflüsterer wrote:


> It would be a pleasure for us.
thanks a lot
> Please provide details about your specific question and/or your code so
> far.
every key in keyboard take time in pressed or released . i want to make 
a vhdl code to count this time duration
first i would make the interface between the keyboard and the fbga then 
from data input i want to make this task
i am new in vhdl so i need any helpful idea.

Author: Bitflüsterer (Guest)
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Provide more detail and/or sample code.

Author: Bitflüsterer (Guest)
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I forgot: Pose a specific question. Not a generic one, like "Help me". 
Shall we switch on light or sharpen your pencil? What is the very, 
primary problem?

Author: Bitflüsterer (Guest)
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To be frankly: If you do not have any slightest idea how to begin, you 
have not enough education/knowledge even to ask appropriate questions.
If so, then read a book about digital logic and do experiments.
Read a book about VHDL and do experiments.
Then, not earlier than half a year, ask questions.

Author: Lothar Miller (lkmiller) (Moderator)
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ahmedhassan wrote:
> i want a vhdl code to compute the time duration for every keystroke in
> the keyboard take to pressed or released
What kind of keyboard? How is it connected to the FPGA?

Author: Bitflüsterer (Guest)
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It's a PS/2-Type. See here: http://embdev.net/topic/327177#3571068

Author: Lothar Miller (lkmiller) (Moderator)
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Bitflüsterer wrote:
> It's a PS/2-Type. See here: http://embdev.net/topic/327177#3571068
I assumed that.

But the only intention of my question was: I wanted ahmedhassan to 
clearify his question himself.
Anyone doing VHDL is not in a kindergarten or a primary school. Usually 
one doing VHDL is on a technical university/college and therefore able 
to ask complete and clear questions. That is what I wanted to point out.

@ahmedhassan
If you want to measure the time between press and release of each key, 
then you need one counter for each key. The counter of is counter is 
reset to 0 and started when you detect a key press, and it is stopped 
when you detect a key release. And if the counter counts up one step 
each ms, then you have the keys time in the according counter register.

Author: Bitflüsterer (Guest)
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Lothar Miller wrote:
> Bitflüsterer wrote:
>> It's a PS/2-Type. See here: http://embdev.net/topic/327177#3571068
> I assumed that.
>
> But the only intention of my question was ...
Ouch. Thought it was a real question, not a rethorical one. Sorry.

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