VGA controller problem.

JUNG Z. OP (Company: student) #7439474
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Hi. I need your help.

I'm trying to make vga_sync_controller which spec are 640x480/60hz.

I coded vga_sync.v by referrening FPGA PROTOTYPING BY VERILOG EXAMPLES BOOK

I don't know why my code did not working properly, when I programmed into my

FPGA board.

Here is my code & my sync timing simulation.

is there incorrect in my code?

// I programmed vga_test.v to my fpga board. //

Attached files:
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Lothar M. Moderator (Company: Titel) #7439729
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JUNG Z. wrote:

Here is my code & my sync timing simulation.

Does that timing fit to the VGA spec?

I don't know why my code did not working properly

What should it do and what does it instead?

when I programmed into my FPGA board.

Did you check the signals with an scope? Do they look liee the simulation?

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JUNG Z. OP (Company: student) #7439749
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YES. as far as I know, I followed the timing spec for 640 x 480 / 60hz

but is it okay starting from display region? my first region is display, then the back porch region, sync region, front porch region are followed as sequential

below is my timing

h_sync

1
 
                   l_____l                             l_____l

<----display----><back><sync><front><----display----><back><sync><front>

I just want to make a vga_sync. then, I want to combine this with my pixel_generator module to output vga.

Did you say about signal tap? I didn't check it, thank you. I'll check it out right now

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Lothar M. Moderator (Company: Titel) #7440015
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JUNG Z. wrote:

but is it okay starting from display region?

Doesn't matter. All the monitor needs to recognize the VGA are the sync signals. When yuo start the didplay rrgion at ghe wrong positions, then simply the picturs on ghe screen is shifted a few pixels.

Did you say about signal tap?

No, I meant a real life scope to measure the signals on their way to the monitor. On those wires to yhe monitor the signals must appear with correct timing and adequate levels.

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DSGV-Violator Guest #7440156
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Sometimes the on-screen display (OSD) of the connected monitor shows useful information such as "Frequency not supported". Therefore, before switching on the FPGA board, activate the status submenu on your monitor and check whether there are any messages.

Sometimes the reversed polarity of V-sync can be a problem. The most common mistake is an incorrect pin assignment and therefore no VGA signal at all on the board's VGA connector.

vsync and hsync can be low enough to be checked with a modern multimeter frequency measurement function. You can try this if you don't have an oscilloscope handy.

Summary: Test your hardware before rewriting your software.

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Lothar M. Moderator (Company: Titel) #7441221
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JUNG Z. wrote:

I don't have any equipment to moniter real life scope.

Change that.

When you don't know whether there are the signals at the pins you want them, and whether they have the correct levels and timings, then you do the job not in a way a real life engineer would do it.

Its "fiddling and fumbling" instead of engineering".

DSGV-Violator wrote:

Summary: Test your hardware

With a scope.

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