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Forum: µC & Digital Electronics STM32 ADC & DMA corrupted Values


von Rebell (Guest)


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Hi Forum

I use adc with dma on different stm32-mcus.
i try to sample 3 channels in continous mode with a long buffer to 
filter later.
this all works as long as there is no additional interrupt.

i set up the system with highest priority for dma(0), but lowesd for 
I2c(3) in NVIC.

What happens:

the order of the adc values in Memory changes for no reason.
1
Value 1 -> Battery Voltage -> adcRawMemory[0]
2
Value 2 -> External Poti -> adcRawMemory[1]
3
Value 3 -> Temperature -> adcRawMemory[2]
4
Value 1 -> Battery Voltage -> adcRawMemory[3]
5
Value 2 -> External Poti -> adcRawMemory[4]
6
Value 3 -> Temperature -> adcRawMemory[5]

after some intterupts on i2c the order changes:
1
Value 1 -> Battery Voltage -> adcRawMemory[1]
2
Value 2 -> External Poti -> adcRawMemory[2]
3
Value 3 -> Temperature -> adcRawMemory[3]
4
Value 1 -> Battery Voltage -> adcRawMemory[4]
5
Value 2 -> External Poti -> adcRawMemory[5]
6
Value 3 -> Temperature -> adcRawMemory[6]

I also see this behavior with the iwd activated...

any one has some fundametal hints to this problem?
Is there any syncronisation issue in the stm32 core that needs to be 
addressd when using ADC with DMA?

Rebell

von Lothar M. (lkmiller) (Moderator)


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Rebell wrote:
> after some intterupts on i2c the order changes:
How long is your "adcRawMemory" buffer? Does it "wrap around" 
autmatically?

> any one has some fundametal hints to this problem?
Did an error occur on the I2C bus meanwhile?

von stefanus (Guest)


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Are you using an STMF103C8xx or STM32F103CBxx? I am asking because the 
web is full of negative reports about fake products with wrong data 
transferred by DMA.

von Rebell (Guest)


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Lothar M. wrote:
>> after some intterupts on i2c the order changes:
> How long is your "adcRawMemory" buffer? Does it "wrap around"
> autmatically?
>
>> any one has some fundametal hints to this problem?
> Did an error occur on the I2C bus meanwhile?

Hi Lothar

adcRawMemory is 288 Bytes and im sampling 6 channels.

I2C Bus error could happen ... i have to check. whats the outcome if 
there is an error?

>Are you using an STMF103C8xx or STM32F103CBxx? I am asking because the
>web is full of negative reports about fake products with wrong data
>transferred by DMA.

the mcus are from the STM32F0xx and STM32G4xx Family. they should be 
genuine, they ar from the time bevor the chipcrisis :-)

thanks, Rebell

von Rebell (Guest)


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i just checked i2c ...

no error on bus when the missalignment is happening ...

Rebell

von Lothar M. (lkmiller) (Moderator)


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Rebell wrote:
> whats the outcome if there is an error?
That depends on how you have configured the reaction to such problems.
Maybe no data is written and so the next AD values move up one 
position...

von Rebell (Guest)


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So what can cause such a "moving"?

ADC and DMA should be independent to any other CPU-driven actions right?
only the DMA can stopp the CPU from accessing the same BUS at the same 
Time when DMA is writing the Values to Mamory.

how can a CPU-driven action compromise the DMA-Pointer or the ADC 
Channel selsction? (of corse without writing to this specific registers 
...)

Rebell

von Rebell (Guest)


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So my guess is:

dma uses the the APB bus for Transfering ADC Values to Memory.

When an I2C-Interrupt occures the APB Bus may be accessed from CPU and 
therfore an access fom DMA is not possible or delayed.

whats the access priority here? i'm not to deep into the architecture 
from STM here...

could the source of this problem a timing issue on the Bus be?

Rebell

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