Hi there, I have a problem with a Siemens TBB206G CMOS PLL EEPROM file on my Sennheiser Wireless receiver (see attachted file). I want to change the frequency in this EEPROM file as there are 16 frequency in this file (668200 MHz, 668700 MHz, 669600 MHz, 670200 MHz, ...., 673850 MHz) to another frequency in this range (668200 MHz to 674000 MHz). for example: 668200 MHz changed to 668400 MHz 668700 MHz changed to 668900 MHz ....... 673850 MHz changed to 674000 MHz Thanks, Dang Huynh
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This EEPROM file from ST24C04. See attached photo
Dang Huynh wrote: > I have a problem with a Siemens TBB206G CMOS PLL EEPROM file... ...and the problem is?
Hi 0ri0n, My target is changing the frequency in the EEPROM file which is controlled by TBB206G. I want to find the total division factor (N, A, R) as the contain of EEPROM file look like: 668200 <--> 2A3ADE 668700 <--> 0E3AEE 669600 <--> 423AFE ...... 671650 <--> 5C3B2E 672450 <--> 7C3B3E 673450 <--> 443B5E 673850 <--> 143B6E 668200 (DEC) --> 2A 3A DE (HEX) So if i want to changing 668200 (2A3ADE) to 668400 (......?) i need to know what is the exactly of total division factor (N, A, R) Thanks
Dang Huynh wrote: > So if i want to changing 668200 (2A3ADE) to 668400 (......?) > i need to know what is the exactly of total division factor (N, A, R) Min. PLL step size: 5 kHz VCO Prescaler (P/P+1): 128/129 Ref. Frequency: Fr = 4000 kHz Ref. Divider: R = 4000 kHz / 5 kHz = 800 (constant value, not saved in EEPROM) First IF Frequency: Fi = 65750 kHz The VCO oscillates 65750 kHz below the receiving frequency. With the TBB206 PLL chip the total VCO division factor is M = N * P + A. Divider A is always smaller than Divider N. Divider P (prescaler factor) is 128. Example (Channel 1): F = 668200 kHz (starting at offset #40 in EEPROM) N/A divider = #2A 3A DE (starting at offset #140 in EEPROM) According to the TBB206 datasheet, the N/A divider needs 22 bits. The last 3 bits contain the target address. In dual modulus mode this bits have to be 111. N/A divider in binary: 0010 1010 0011 1010 1101 1110. First and last bit is always 0. Bits 2...8 contain the value of divider A and bits 9...23 that of divider N. Divider A = 42 Divider N = 941 Total division factor: M = N * P + A = 941 * 128 + 42 = 120490 VCO frequency: Fvco = M * 5 kHz = 602450 kHz Receiving frequency: F = Fvco + Fi = 602450 kHz + 65750 kHz = 668200 kHz For moving channel 1 to a frequency of 668400 kHz you could keep divider N at 941 and increase divider A to 82.
0ri0n was posted > > > > Example (Channel 1): > > F = 668200 kHz (starting at offset #40 in EEPROM) > > N/A divider = #2A 3A DE (starting at offset #140 in EEPROM) > > According to the TBB206 datasheet, the N/A divider needs 22 bits. The > last 3 bits contain the target address. In dual modulus mode this bits > have to be 111. > > N/A divider in binary: 0010 1010 0011 1010 1101 1110. > > First and last bit is always 0. Bits 2...8 contain the value of divider > A and bits 9...23 that of divider N. > > Divider A = 42 > > Divider N = 941 > > Total division factor: M = N * P + A = 941 * 128 + 42 = 120490 > > VCO frequency: Fvco = M * 5 kHz = 602450 kHz > > Receiving frequency: F = Fvco + Fi = 602450 kHz + 65750 kHz = 668200 kHz > > For moving channel 1 to a frequency of 668400 kHz you could keep divider > N at 941 and increase divider A to 82. Hi 0ri0n, I would like to thank you so much! It is work perfectly. I have changed the frequency successfully. Regards, Dang Huynh
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