VHDL System Reset by PLL Locked Signal

Duke Scarring Guest #6313162
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Modelsim simulation project?
I do a very lot of simulations, but never needed a modelsim project for 
that.
To start modelsim you need only a couple of commands:
1
vlib work

2
vcom *.vhd

3
vsim toplevel_of_testbench -gui


Inside modelsim the same:
1
add wave *

2
run -all


Please, please, please: Stop wasting bandwidth with your zip files!

Duke
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