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Forum: FPGA, VHDL & Verilog Stopwatch in VHDL


von Andrew (Guest)


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Hello everyone!
Is it possible to create stopwatch in VHDL with 4 times memory? Start 
and stop on the one button, memory set on the second button. One second 
accuracy

von -gb- (Guest)


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Offcourse, Sure, freilich, if you can draw a state diagram at least in 
your mind. With the right hardware this precision is also possible.

But a cheap microcontroller would also fit the task.

von Andrew (Guest)


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How to start with code?

von -gb- (Guest)


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If you don't have a Städte concept in your mind then draw one first.

What are the inputs and outputs?

And then write the neccessary logic.

von -gb- (Guest)


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