hi... I am writing a code where i have to generate sclk for ADC .here sys clock frequency and SCLK frequency of ADC are same .pl tell how to assign clock as a signal under if a condition for eg process(Clk) begin .... ..... if (counter > 4 and counter < 15) then S_clk<= Clk; Thanks
pall wrote: > sys clock frequency and SCLK frequency of ADC are same Is the sysclock that slow or the SCLK that high? What frequencies do you have?
my system clock frequency is 50Mhz and same frequency i have to generate for SCLK of ADC .i attempted to assign SCLK same as my system clock but its not working