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Forum: FPGA, VHDL & Verilog Vivado HLS experiences with Zynq boards


Author: Zoltán L. (Company: Lombiq Technologies Ltd.) (zoltanlehoczky)
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Hey everyone!

I’m curious about what experiences everyone has here using Vivado HLS 
with a Zynq-based board. Would you share yours?

- If you haven’t used Vivado HLS, why not? E.g. didn’t like the IDE, 
didn’t like the languages, hard to learn, too low level (I like nicer 
programming environments), too high level (I’m fine with VHDL/Verilog).

- If you have used Vivado HLS, what did you dislike? E.g. didn’t like 
the IDE, didn’t like the languages, hard to learn, hard to debug.

We’re doing this for our company, researching whether to come up with a 
new, programmer-focused HLS tool for Zynq owners. Driven more like out 
of curiosity than a particular business case. If you’d like to be kept 
in the loop add “yes PM” to the end of your message and I’ll get in 
touch with you via a private message.

Author: Moadl K. (Company: XXX) (moadl)
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Hello Zóltan,

I am a frequent user of Vivado HLS and also some of the other high-level 
tools that Xilinx provides.
I personally find HLS very attractive in how it works. What I like is 
that it creates IP-blocks for easy further processing in the Xilinx 
devices, i.e. in Vivado. What I dislike, however that is just the nature 
of the beast, it can only do one single clock-domain.
For Zynq especially also the SDSoC-approach is pretty strong where one 
has the "Main-Loop" running on the processor and then having the 
possibility to bring over functions into the fabric.

Debugging I find relatively intuitive, however that may be coming with 
experience. The Debugging is on HLS itself in the code or once in a blue 
moon also on HW using ChipScope.

Cheers

Moadl

Author: Bonzo (Guest)
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Zoltán L. wrote:
> We’re doing this for our company, researching

this is no serious research but fishing in the dark

you will only get false information by unskilled persons like this one:

Moadl K. wrote:
> What I dislike, however that is just the nature
> of the beast, it can only do one single clock-domain.
this is wrong like your first senntence too

Author: Zoltán L. (Company: Lombiq Technologies Ltd.) (zoltanlehoczky)
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Thank you for your valuable insights Moadl!

Bonzo: I only called it "research" because it's shorter, but let's call 
it "fishing in the dark" instead :).

Author: Moadl K. (Company: XXX) (moadl)
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Bonzo wrote:
> Zoltán L. wrote:
>> We’re doing this for our company, researching
>
> this is no serious research but fishing in the dark
>
> you will only get false information by unskilled persons like this one:
>
> Moadl K. wrote:
>> What I dislike, however that is just the nature
>> of the beast, it can only do one single clock-domain.
> this is wrong like your first senntence too

Thanks a lot for your judgement on my skills, I feel slightly amused 
now...

So what makes you think that my statement about the clock-domains is 
wrong? Ever worked von Vivado HLS? You know about ap_clk and what it is 
used for?

Amused greetings...

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