Greetings, I'm designing a PWM module,with a 4 bits control. My specs,a 4-bits input control,input clock 50MHz, a single bit output PWM_o, when control changes,the duty cycle of PWM_o changes, like control = 0,PWM_o = 0;Control = 1,PWM_o = 6.25%...increase 6.25% each time(meaning that PWM_o should be wider and wider each time it outputs when Control increase).Desired result should be like marked with red rectangular in the first photo. I've tried so many version of ways to write it,I've noticed the common issue is that my Control changing too fast and I don't know how to delay it,I need to make the Control change after 16 pulses of input Clock,I just can't figure out how to do it... I don't understand how to delay a set of multiple bits of input... Here down below are my attempting,my attempting's output is almost correct,but just the issue with the Control.. Noted: Control is named as `value` in the codes; Attempting 1:

1 | module pwm_c(clk,value,rst,PWM_out,counter,rst); |

2 | input clk,rst; |

3 | input [3:0] value; |

4 | output PWM_out; |

5 | reg PWM_out; |

6 | |

7 | output reg [3:0]counter; |

8 | |

9 | |

10 | always@(posedge clk) |

11 | ```
begin
``` |

12 | if(!rst) |

13 | counter <= 4'd0; |

14 | ```
else
``` |

15 | counter <= counter + 4'd1; |

16 | ```
end
``` |

17 | |

18 | always@(counter or value) |

19 | ```
begin
``` |

20 | if(value == 4'd0) |

21 | PWM_out = 1'b0; |

22 | else if(value == 4'd1) |

23 | PWM_out = (counter >=4'd1) ? 1'b0:1'b1; |

24 | else if(value == 4'd2) |

25 | PWM_out = (counter >=4'd2) ? 1'b0:1'b1; |

26 | else if(value == 4'd3) |

27 | PWM_out = (counter >= 4'd3) ? 1'b0:1'b1; |

28 | else if(value == 4'd4) |

29 | PWM_out = (counter >= 4'd4) ? 1'b0:1'b1; |

30 | |

31 | else if(value == 4'd5) |

32 | PWM_out = (counter >= 4'd5) ? 1'b0:1'b1; |

33 | else if(value == 4'd6) |

34 | PWM_out = (counter >= 4'd6) ? 1'b0:1'b1; |

35 | else if(value == 4'd7) |

36 | PWM_out = (counter >= 4'd7) ? 1'b0:1'b1; |

37 | else if(value == 4'd8) |

38 | PWM_out = (counter >= 4'd8) ? 1'b0:1'b1; |

39 | |

40 | |

41 | else if(value == 4'd9) |

42 | PWM_out = (counter >= 4'd9) ? 1'b0:1'b1; |

43 | else if(value == 4'd10) |

44 | PWM_out = (counter >= 4'd10) ? 1'b0:1'b1; |

45 | else if(value == 4'd11) |

46 | PWM_out = (counter >= 4'd11) ? 1'b0:1'b1; |

47 | else if(value == 4'd12) |

48 | PWM_out = (counter >= 4'd12) ? 1'b0:1'b1; |

49 | |

50 | else if(value == 4'd13) |

51 | PWM_out = (counter >= 4'd13) ? 1'b0:1'b1; |

52 | else if(value == 4'd14) |

53 | PWM_out = (counter >= 4'd14) ? 1'b0:1'b1; |

54 | else if(value == 4'd15) |

55 | PWM_out = (counter >= 4'd15) ? 1'b0:1'b1; |

56 | |

57 | |

58 | ```
else
``` |

59 | PWM_out = 1'b0; |

60 | ```
end
``` |

61 | ```
endmodule
``` |

Attempting 2:

1 | module pwm_c(clk,value,rst,PWM_out,counter); |

2 | input clk,rst; |

3 | input wire [3:0] value; |

4 | output PWM_out; |

5 | reg PWM_out; |

6 | |

7 | output reg [3:0]counter; |

8 | |

9 | |

10 | |

11 | |

12 | always@(posedge clk) |

13 | ```
begin
``` |

14 | if(!rst) |

15 | counter <= 4'd0; |

16 | ```
else
``` |

17 | counter <= counter + 4'd1; |

18 | ```
end
``` |

19 | |

20 | always@(counter or value) |

21 | ```
begin
``` |

22 | if(value == 4'd0) |

23 | PWM_out = 1'b0; |

24 | else if(value == 4'd1) |

25 | PWM_out = counter<2; |

26 | else if(value == 4'd2) |

27 | PWM_out = counter<2; |

28 | else if(value == 4'd3) |

29 | PWM_out = counter<2; |

30 | else if(value == 4'd4) |

31 | PWM_out = counter<2; |

32 | |

33 | else if(value == 4'd5) |

34 | PWM_out = counter<4; |

35 | else if(value == 4'd6) |

36 | PWM_out = counter<4; |

37 | else if(value == 4'd7) |

38 | PWM_out = counter<4; |

39 | else if(value == 4'd8) |

40 | PWM_out = counter<4; |

41 | |

42 | |

43 | else if(value == 4'd9) |

44 | PWM_out = counter<6; |

45 | else if(value == 4'd10) |

46 | PWM_out = counter<6; |

47 | else if(value == 4'd11) |

48 | PWM_out = counter<6; |

49 | else if(value == 4'd12) |

50 | PWM_out = counter<6; |

51 | |

52 | else if(value == 4'd13) |

53 | PWM_out = counter<15; |

54 | else if(value == 4'd14) |

55 | PWM_out = counter<15; |

56 | else if(value == 4'd15) |

57 | PWM_out = counter<15; |

58 | |

59 | |

60 | ```
else
``` |

61 | PWM_out = 1'b0; |

62 | ```
end
``` |

63 | |

64 | ```
endmodule
``` |

Attempting 3:

1 | module pwm_c |

2 | ```
(
``` |

3 | input clk,rst, |

4 | input [3:0] value, |

5 | output PWM_out, |

6 | output reg [3:0]counter |

7 | ```
);
``` |

8 | |

9 | |

10 | |

11 | always@(posedge clk) |

12 | ```
begin
``` |

13 | if(!rst) |

14 | counter <= 4'd0; |

15 | ```
else
``` |

16 | counter <= counter + 4'd1; |

17 | ```
end
``` |

18 | |

19 | assign PWM_out = (counter > value) ? 1'b1 : 1'b0; |

20 | |

21 | ```
endmodule
``` |