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Forum: FPGA, VHDL & Verilog System Verilog alarm clock


Author: Andrew M. (amiotto11)
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I need some help getting started with writing code for a few different 
functions for this alarm clock. The code that I have started is in the 
attachment. Im not sure where to begin with writing the rest of the code 
for the alarm module. I also need help implementing functionality to set 
the time of the clock. Thanks.

definitions of variables
clk_2Hz --- 2Hz clock
hrs1_min0 --- set hrs set to 1 to set minutes set to 0, SW3
reset --- resets the entire clock, SW0
t_set --- set clock time, SW1
a_set --- alarm time, SW2
run_clock --- run_clock = 1 would cause the clock to run, SW4
a_act --- activates the alarm, SW5
almreset --- the alarm is going off and you want to reset it, KEY0
runset- ---- when this is 1 run, when this is 0 set
sec, min, hrs --- clock time
min_alarm, hrs_alarm --- alarm time
alrm --- the alarm

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