// Alarm Clock //Clock Module module ClockCounter(input clk_2Hz, run_clock, reset, input [7:0] MaxCount, output reg [7:0] Count, output reg Carry); always_ff@(posedge clk_2hz or posedge reset) begin if (reset) begin Count <= 0; Carry <= 0; end else if (run_clock) if (Count < MaxCount) begin Count <= Count + 8'd1; Carry <= 0; end else begin Count <= 0; Carry <= 1; end end endmodule // Clock Timer module timer(input clk_2Hz, reset_t, run_clock_t, t_set output [7:0] hrs, min, sec); wire clk_sec, Carry_scl, Carry_mcl, Carry_hcl; wire [7:0] fiftynine, twentythree; assign clk_sec = clk_2Hz; // Default constant values which will be max count for hours and minutes assign fiftynine = 59; assign twentythree = 23; //Instantiation of clock counter module 3 times for hours,minutes and seconds clock ClockCounter SecClk (clk_sec, run_clock_t, reset_t, fiftynine, sec, Carry_scl); ClockCounter MinClk (Carry_scl, (run_clock_t|t_set), reset_t, fiftynine, min, Carry_mcl); ClockCounter HrClk (Carry_mcl, (run_clock_t|t_set), reset_t, twentythree, hrs, Carry_hcl); endmodule // Alarm module module alarm(input a_set, a_act, almreset, output reg [7:0] min_alrm, hrs_alrm, output reg alrm);