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Forum: FPGA, VHDL & Verilog vhdl code to find max value of stream of unsigned 8 bit values


Author: Jeevan R. (jynal)
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Describtion about the subject.
The unsigned values should be presented on an input vector(comnected to 
slife switches S1-S8) and as soon as the read_in( connected to button 
TA2) is pressed the value has read and checked if itis the maximum or 
not. The maximum value should be given to LEDs( IN1-IN8) of the 
out_max(connected to the button TA1) is pressed.

Author: piss of cake (Guest)
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if rising_edge(clk) then
 if reset = '1' then
  max_value <= (others => '0');
 else
  if cur_val > max_value then
   max_value <= cur_value;
  end if;
 end if;
end if;

Author: Lothar M. (lkmiller) (Moderator)
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Jeevan R. wrote:
> Describtion about the subject.
This obviously is some kind of homework. Your teacher wants you to do 
something and learn by doing that. We should not override this 
intention. So let's try it this way: you start with something and we 
help you on particular questions.
But one one simply will do your homework for you...

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