Hi, I have hard time thinking of a fpga on which we could dynamically load programs, from say, the internet (via a spi wifi module for example). It would be a small and simple OS able to load and unload processes. 1) The first problem is that it would involve self modifying code (for memory etc..), and we don't get the binary structure for fpga X or Y, as it is closed source. 2) Even then, it may require an interruption of the system to load a new complete image to the board, since partial reconfiguration is possible but requires external machinery to preform the binary anyway. requires a lot of coordination not to loose work in progress and stop everything. 3) Maybe virtual classes <-> dynamic allocation(Systemverilog) could help but not sure about the performance. So if some of you achieved this goal, what is the logic I should follow? Thanks,
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Mark L. wrote: > what is the logic I should follow? Your thougts are way too abstract for a FPGA... Thinking about OSes and memory is in no way related to FGPAs, instead its thinking about structures. What do you want to reconfigure on the FPGA and why? Do you want to load a new processor design during execution? Or do you simply want to load new Software and start it afterwards?
Thanks for your answer, I plan to have one process running on the fpga, but based on the environment, the process may need different libraries. Those would be impractical to embed completely. The environment varies from hours to hours and minutely in some extreme cases. So yes, I would like to be able to load a new process downloaded from my servers and execute it alongside the first process.
An FPGA does not execute an OS or run processes. An FPGA can be configured to implement a CPU which does those things. Of course, you could use a regular CPU directly, what do you need the FPGA for?
Actually, The plan is to be the most effective as possible. i want a very personalized experience. When looking at ARM cpus, I keep disabling functionalities: the only thing I want is my code executing with nothing else in my way. But I think I could download a textual description and rebuild the program using SystemVerilog (virtual) classes, via dynamic memory allocation. That would be a serious hack but maybe it could work. My work is massively parallel.
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When "not using" features of an ARM CPU is too much trouble for you, you should stop looking at FPGAs ... I'm over and out.
It is not that it is a hassle, it is that it is not needed. So I am looking at something with less features by default.
What features do you need? What features do you want to be changeable? What do you know about FPGA except of "fast", "parallel", "flexible"? Do you know that there is no code operating or running on a FPGA? Do you know that you cannot load a library into a FPGA?
What you are planning is currently subject to intensive research. The basic idea of an operating system must be considerably revised in connection with FPGA since you have sophisticated dependencies of the tasks (i.e., FPGA modules) w.r.t to space and time. A good starting point may be this paper: https://link.springer.com/chapter/10.1007%2F11682127_15 "But I think I could download a textual description and rebuild the program using SystemVerilog (virtual) classes, via dynamic memory allocation." I have the strong impression you have a wrong understanding of FPGA and hardware design. There is nothing "running" on the FPGA, as discussed here many times. During the design process, a structure is created which is loaded onto the FPGA, where it resides during operation, but it is never executed in some way like a piece of software. Especially the hdl code (SystemVerilog for instance) is never executed somewhere (except in a simulation environment). For example, if you have a piece of software which is executed on a processor, you can stop the execution at any time and make a statement like "Curently, the machine code of line 1355 of my source code is executed". For an FPGA design, you can't. The FPGA configuration is simply there, like a bunch of electronic components that are connected in a meaningful way. You would never say that the electronic parts in your FM radio are executed while listening to a station. So my advise is, make yourself more familiar with FPGA and HDL design, and then think again about your "OS on FPGA" thing.
Thanks Vancouver, I get it. I may have to chill a bit and make sure FPGA is the right tool for the job. Thanks again :)
Mark L. wrote: > So I am looking at something with less features by default. Take a smaller uC with less features. When you don't know FPGA up to now you will get in much more hassle than you expect: the design process and strategy is totally different to all you know. You will have to start at 0. When you don't do then you will get back there later. Remember me ;-)
Thanks, I get it. I spent the whole afternoon reading the basics of fpga. Yes, it is a really big subject and I confess I underestimated it. I have been superficial. But it may become a hobby :) in the meantime, an array of uC will do. Thanks again,
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