Hello, from the theory in the attached photo i have implemented the
formula in the VERILOG code bellow, the syntax check was fine but when
i tried in XILINX to force values the simulation gives me an empty
screen and says:
# run 1.00us
INFO: Simulator is stopped.
where did i go wrong in entering the coefficients?
always #((1/fo_b-vctl_b*kv_b/fo_b^2)/2) vco_b<=~vco_b;