Hi
I would like to seek advice.
I will be developing a logic sniffer using an FPGA.
I had little background on FPGA and I really like to learn it through
this project. The device that I will use can either be from Latice,
Altera or Xilinx.
This logic sniffer will be use to display the output of a motor driver
to a PC application through USB.
I have vague idea on how to implement this currently.
My image is I will need an FPGA and a RAM, a USB Controller.
In FPGA, I think I need a USB IP, and the rest is vague idea like a
counter, then an edge trigger module that can reset the counter and save
counter value to RAM...
I will really appreciate any advice or Guide.
Thanks,
Mike