EmbDev.net

Forum: FPGA, VHDL & Verilog Need help in code


Author: Gombo Khorloo (grizzly09)
Posted on:
Attached files:

Rate this post
0 useful
not useful
Hello
I'm currently working on my assignment in Spartan-3E.My assignment is:
While button is clicked show values of switches in low 4 bit of LED,when 
button is released move from left to right.Switching speed 2Hz.
But i haven't got any success so far.It not even showing values of 
switch.
And here is my code:
library IEEE;

use IEEE.STD_LOGIC_1164.ALL;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;


entity daalgavar_13 is
Port ( clk : in STD_LOGIC;
       led : out STD_LOGIC_VECTOR (7 downto 0);
       button : in std_logic;
       switch : in  STD_LOGIC_VECTOR (3 downto 0));
end daalgavar_13;

architecture Behavioral of daalgavar_13 is

signal clk_2G: std_logic;

signal tooluur: integer range 0 to 25000000;
signal data : STD_LOGIC_VECTOR (7 downto 0);
 begin 

--led<=data;

 process(clk_2G) --, switch)
 variable temp:std_logic_vector(7 downto 0);
 begin
 --if (rst = '0') then
 if clk_2G'event and clk_2G='1' then
  if button='1' then
   data <="0000" & switch(3 downto 0);
  else 
   temp := data;
   data <= temp (6 downto 0)& temp(7) ;
  end if;
 end if;
end process;

led<=data;

process(clk)
begin
 if clk'event and clk='1' then 
  if tooluur=25000000 then  --2Hz
   tooluur<=0;
   clk_2G<='1';
   else 
    tooluur<=tooluur+1;
    clk_2G<='0';
   end if;
  end if;
 end process;
end Behavioral;



Thank you

: Edited by Moderator
Author: Lothar Miller (lkmiller) (Moderator)
Posted on:

Rate this post
0 useful
not useful
Rock B. wrote:
> where did i go wrong?
First: what does the simulation say?

Second: use your clock enable as a clock enable, not as a clock:
process(clk) -- the one and only clock in the whole design!
variable temp:std_logic_vector(7 downto 0);
begin
   if clk'event and clk='1' then
      if clk_2G='1' then -- this is the 2Hz clock enable
         if button='1' then
            data <="0000" & switch(3 downto 0);
         else 
            ...

Third, why this:
   temp := data;
   data <= temp (6 downto 0)& temp(7) ;
And not simply this:
   data <= data(6 downto 0)& data(7) ;

: Edited by Moderator
Author: Vancouver (Guest)
Posted on:

Rate this post
0 useful
not useful
Assuming the simulation is fine:

- Are you sure that the pin mapping on your board (ucf) is correct?
- Is the clock source running and at the correct frequency as assumed by 
your clock divider?
 Can you monitor clk_2G on an LED?

Author: arliepitogo (Guest)
Posted on:

Rate this post
0 useful
not useful
solve the following codes using cnc

explain the defferent codes what is the function?

G17G20G90G94G54

Reply

Entering an e-mail address is optional. If you want to receive reply notifications by e-mail, please log in.

Rules — please read before posting

  • Post long source code as attachment, not in the text
  • Posting advertisements is forbidden.

Formatting options

  • [c]C code[/c]
  • [avrasm]AVR assembler code[/avrasm]
  • [vhdl]VHDL code[/vhdl]
  • [code]code in other languages, ASCII drawings[/code]
  • [math]formula (LaTeX syntax)[/math]




Bild automatisch verkleinern, falls nötig