Martin wrote:
> a fixed floating point.
I do not understand what this may be.
I know either "floating point" numbers or "fixed point" numbers.
But a "fixed floting point number" is such a thing like a "flying 
submarine".
A "fixed point" number/integer is looking like a normal number/integer. 
Only you add a mental position to it which represets a point. The 
whole behaviour of the integer always stays the same.
Its a little bit like having a current of 3456 mA in a wire. That is the 
very same current like 3.456 A. It is the same current. Just divided by 
1000 and therefore getting a point.

So the integer (the current) itself doesn't even "know" that it has a 
pinot in it. You can handle it (add, sub, mul...) like a "normal" 
integer. Only you must keep an eye on the position of the point:
lets multiply two numbers: 100 * 100 = 10000
When those numbers 100 would be 2.1 fixed point numbers they would 
represent 10.0 and the result of the multiplication 10000 must will have 
the format 4.2, so you must position the point in a way you have 2 
fractional digits: 100.00

> Algorithm of integer multiplication:
Thats the usual multiplication like you do it with a pencil on a sheeet 
of paper.

> Q [n-1: 0]
That is wrong. It must be Q[2n-1 : 0] because the result of a 
multiplication is as wide as the sum of both inputs width!
Its easy to see: let n be 8, so we get an integer ranging from -128 to 
128. So we can easily calculate 100*100 = 10000. Fairly easy to see, 
that this result does not fit into -128 to 127...

> How to start with it?
Write a code for multiplying two unsigned integers without any point. 
Wrap that code with a sign-handler. Preform the multiplication of the 
fixed integer number like it would be a "normal" integer. Align the 
result to the output register in a way that the "point" (which is only a 
mental point) is at the correct position. Thats all.

You will need some sheets of paper and a few hours of thougts to get 
it...

That means you have n bits wide vectors.
In VHDL you would write (n-1 downto 0).

Martin wrote:
> There one advanced user told that, C is still 32-bit as result of
> multiplication of 2 integers. But how to apply something like that to my
> problem?
It's a thoroughly correct but in your case absolutely useless 
information.
Maybe you asked the wrong question...

Martin wrote:
> It isnt working.. I
What is "it"?

Try this:

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library IEEE;

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use IEEE.STD_LOGIC_1164.ALL;

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use IEEE.numeric_std.ALL;

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entity MultExample is

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Generic ( n  : natural := 16);

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Port (a,b : in std_logic_vector(n-1 downto 0),

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          c.  : out std_logic_vector(2*n-1 downto 0));

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end MultExample;

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architecture Behavioral of MultExample is

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begin

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    c <= std_logic_vector(unsigned(a)*unsigned(b));

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end Behavioral;

Martin wrote:
> Is alghoritm ok in Behavioral?
It's a pseudo language. The synthesizer will not understand it. It will 
produce lots of errors.

> Port (A,B,Q : in std_logic_vector(n-1 downto 0);
Why Q?

My best hint ist to discuss this little piece of homework with one of 
your classmates! I can't see no progress here with that topic. We are 
discussing about things on a level similar to 1+1 in arithmetics...

Martin wrote:
> Must i remake it to VHDL format?
First you must understand the algorithm in those lines. Then you can 
convert them to VHDL.

The inputs are two operands as vectors and the output is one vector of 
(curiously) the same length.

The PC (name it progress counter) and the C (name it carry) are only 
local signals.

Indeed the text of that exercise is wrong (or at least misleading), 
because due to the fact that a multiplication is thoroughly 
combinatorial there are no registers needed to get the result.