Verilog if statement

Hareesh M. wrote:
> please anyone tell the difference between the below if statement
I see two different signals. They may have a different function 
also.
Consult the spec of those signals or the schematics for further 
information.

Lothar M. wrote:
> Hareesh M. wrote:
>> please anyone tell the difference between the below if statement
> I see two different signals. They may have a /different function/
> also.
> Consult the spec of those signals or the schematics for further
> information.

pon_rst_n is a active low signal and v3v3_pgood is a active high signal

Hareesh M. wrote:
> pon_rst_n is a active low signal and v3v3_pgood is a active high signal
From the very same source/pin?

i actually need to know the statement

1

 if(!pon_rst_n)

 and

1

 if(!v3v3_pgood)

. if i have a pon_rst_n = 1 what will be the output and if i have a 
v3v3_pgood = 0 what will be the result.