Lothar M. wrote: > It's x"08000" or 16#08000# Depends on type. 16#*# works for integer; x"*" for std_logic_vector and alike. The later is restricted to vectors with width 4,8,12,16,20,..,4*n. https://stackoverflow.com/questions/38777859/vhdl-using-hex-values-in-constants

Lothar M. wrote: > It's x"08000" or 16#08000# but for hex, decimal and binary all have x kind of representation?

Hareesh M. wrote: > Lothar M. wrote: >> It's x"08000" or 16#08000# > > but for hex, decimal and binary all have x kind of representation? No.

C. A. Rotwang wrote: > Hareesh M. wrote: >> Lothar M. wrote: >>> It's x"08000" or 16#08000# >> >> but for hex, decimal and binary all have x kind of representation? > > No. could you suggest any document for this?

Hareesh M. wrote: > C. A. Rotwang wrote: >> Hareesh M. wrote: >>> Lothar M. wrote: >>>> It's x"08000" or 16#08000# >>> >>> but for hex, decimal and binary all have x kind of representation? >> >> No. > > could you suggest any document for this? See the stackoverflow-link above. For Details about the x" representation at std_logic_vector and so see the source Code of the according libraries: https://standards.ieee.org/downloads/1076/1076.2-1996/ For uses of literals written as 16#* alike, see http://vhdl.renerta.com/mobile/source/vhd00041.htm Over and Out,

Supplement: You must disitinct between "numeric literals" and "bit vector literals". See reference guide http://www.ics.uci.edu/~jmoorkan/vhdlref/literals.html. Note the reference to the VHDL Language Reference Manual (LRM) sections in the head of the page.

Hareesh M. wrote: > could you suggest any document for this? https://www.amazon.de/Designers-Guide-VHDL-Peter-Ashenden/dp/1558606742

You cant't. Number of bits is always number of digits*4. If you need another number of bits, you need to create a subvector: y <= X"1200"; -- 16bit vector z <= y(12 downto 0); -- 13bit subvector

Vancouver wrote: > You cant't. Number of bits is always number of digits*4. If you need > another number of bits, you need to create a subvector: > > y <= X"1200"; -- 16bit vector > z <= y(12 downto 0); -- 13bit subvector actually i want to initialize as constant and need to call in a case statement.

Hareesh M. wrote: > Lothar M. wrote: >> It's x"08000" or 16#08000# > > but how can i represent the no: of bits If your toolset supports VHDL 2008, you can define literals with a leading length indicator:

17x"08000" |

will create a 17 bit wide constant.

Anyway, afaik there is no way in VHDL to specify the exact number of bits in a hexadecimal constant. You could say something like "00"&x"1200" for 18bit. Or you can use the to_unsigned conversion function of numeric.std which takes the number of bits as parameter. See p.17 in http://www.synthworks.com/papers/vhdl_math_tricks_mapld_2003.pdf But there is no nice shortcut like in Verilog.